MT9HVF3272KY-667B1 Micron Technology Inc, MT9HVF3272KY-667B1 Datasheet - Page 36

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MT9HVF3272KY-667B1

Manufacturer Part Number
MT9HVF3272KY-667B1
Description
MODULE DDR2 256MB 244MDIMM VLP
Manufacturer
Micron Technology Inc

Specifications of MT9HVF3272KY-667B1

Memory Type
DDR2 SDRAM
Memory Size
256MB
Speed
667MT/s
Package / Case
244-MDIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
244VLP MiniRDIMM
Device Core Size
72b
Organization
32Mx72
Total Density
256MByte
Chip Density
256Mb
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.71A
Number Of Elements
9
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 55C
Operating Temperature Classification
Commercial
Pin Count
244
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Notes
PDF: 09005aef81c9620b/Source: 09005aef81c961ec
HVF9C32_64_128x72K_2.fm - Rev. B 11/05 EN
10.
11. The intent of the “Don’t Care” state after completion of the postamble is the DQS-
1. All voltages referenced to V
2. Tests for AC timing,
3. Outputs measured with equivalent load:
4. AC timing and
5. The AC and DC input level specifications are as defined in the SSTL_18 standard (i.e.,
6. Command/Address minimum input slew rate is at 1.0V/ns. Command/Address input
7. Data minimum input slew rate is at 1.0V/ns. Data input timing must be derated if the
8.
9. This maximum value is derived from the referenced test load.
nominal reference/supply voltage levels, but the related specifications and device
operation are guaranteed for the full voltage range specified.
ment and parameter specifications are guaranteed for the specified AC input levels
under normal use conditions. The minimum slew rate for the input signals used to
test the device is 1.0V/ns for signals in the range between V
rates less than 1.0V/ns require the timing parameters to be derated as specified.
the receiver will effectively switch as a result of the signal crossing the AC input level
and will remain in that state as long as the signal does not ring back above [below] the
DC input LOW [HIGH] level).
timing must be derated if the slew rate is not 1.0V/ns. This is easily accommodated
using
data sheet.
for a falling signal.
V
1.0V/ns slew rate; these are the “base” values.
slew rate is not 1.0V/ns. This is easily accommodated if the timing is referenced from
the logic trip points.
and V
signal and V
for a 1.0V/ns slew rate. If the DQS/DQS# differential strobe feature is not enabled,
timing is no longer referenced to the crosspoint of DQS/DQS#. Data timing is now
referenced to V
slew rate is less than 1.0V/ns, then data timing is now referenced to V
ing DQS and V
t
tions. These parameters are not referenced to a specific voltage level, but specify
when the device output is no longer driving (
over
t
driven signal should either be HIGH, LOW or High-Z and that any signal transition
within the input switching region must follow valid input requirements. That is if
DQS transitions HIGH (above V
V
Output
(V
HZ and
LZ (MIN) will prevail over a
256MB, 512MB, 1GB: (x72, SR) 244-Pin DDR2 VLP Reg. MiniDIMM
IL
IH
OUT
(
[DC] prior to
DC
t
DQSCK (MAX) +
IL
t
)
V
) for a falling signal. The timing table also lists the
ISb and the Setup and Hold Time Derating Values tables from the component
(
TT =
AC
t
LZ transitions occur in the same access time windows as valid data transi-
) for a falling signal.
t
V
IS timing (
IL
DD
(
25Ω
DC
IL
I
REF
DD
Q/2
(
t
DC
) for a falling signal. The timing table lists the
DQSH[MIN]).
tests may use a V
Reference
Point
, provided the DQS slew rate is not less than 1.0V/ns. If the DQS
t
IH timing (
) for a falling DQS.
I
DD
t
DS timing (
t
t
, and electrical AC and DC characteristics may be conducted at
IS
RPST (MAX) condition.
b
) is referenced from V
36
SS
t
.
DQSCK (MIN) +
t
t
IH
IH timing (
IH
t
DS
b
[DC]MIN), then it must not transition LOW (below
) is referenced from V
IL
b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
-to-V
) is referenced from V
t
IH
IH
swing of up to 1.0V in the test environ-
t
b
HZ) or begins driving (
t
) is referenced from V
RPRE (MAX) condition.
IH
(
AC
) for a rising signal and V
IH
t
©2004, 2005 Micron Technology, Inc. All rights reserved.
IS
(
IH
IL
AC
b
and
(
(
AC
) for a rising signal and
AC
t
t
HZ (MAX) will prevail
DS
) and V
) for a rising signal
t
IH
b
IH
and
b
t
LZ).
IH
values for a
(
DC
IH
(
AC
t
DH
(
) for a rising
AC
) for a ris-
). Slew
b
IL
Notes
values
(
AC
)

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