STEVAL-ISQ002V1 STMicroelectronics, STEVAL-ISQ002V1 Datasheet - Page 144
![BOARD EVAL BASED ON ST72264G1](/photos/9/9/90917/steval-isq002v1_sml.jpg)
STEVAL-ISQ002V1
Manufacturer Part Number
STEVAL-ISQ002V1
Description
BOARD EVAL BASED ON ST72264G1
Manufacturer
STMicroelectronics
Specifications of STEVAL-ISQ002V1
Main Purpose
Interface, PMBus
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F264
Primary Attributes
The PMBus™ Interface Using the ST7 I2C Peripheral
Secondary Attributes
Firmware in C Language
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6423
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STEVAL-ISQ002V1
Manufacturer:
STMicroelectronics
Quantity:
1
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ST72260Gx, ST72262Gx, ST72264Gx
13.8 I/O PORT PIN CHARACTERISTICS
13.8.1 General Characteristics
T
Notes:
1. Data based on characterization results, not tested in production.
2. I
respected, the injection current must be limited externally to the I
while a negative injection is induced by V
corresponding V
Caution: Negative current injection not allowed on Flash device pins PB0 and PB1.
3. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example and leaving the I/O unconnected on the board or an external pull-up or pull-down resistor (see
based on design simulation and/or technology characteristics, not tested in production.
4. The R
scribed in
5. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Figure 76. Two typical Applications with unused I/O Pin configured as input
144/172
ΣI
I
A
Symbol
INJ(PIN)
t
t
INJ(PIN)
t
f(IO)out
r(IO)out
w(IT)in
INJ(PIN)
V
R
= -40 to +85°C unless otherwise specified
C
V
V
I
I
hys
PU
S
IH
L
IO
IL
Note: I/O can be left unconnected if it is configured as output (0 or 1) by the software. This has the advantage of greater EMC
robustness and lower cost.
2)
PU
2)
Figure
must never be exceeded. This is implicitly insured if V
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Injected current on Flash device
pins PB0 and PB1
Injected Current on other I/O pins
Total injected current (sum of all I/O
and control pins)
Input leakage current
Static current consumption
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
pull-up equivalent resistor is based on a resistive transistor (corresponding I
IN
77).
maximum must always be respected.
V
DD
Parameter
10kΩ
UNUSED I/O PORT
1)
1)
5)
IN
ST7XXX
<V
4)
1)
SS
1)
1)
. For true open-drain pads, there is no positive injection current, and the
V
V
Floating input mode
V
C
Between 10% and 90%
DD
SS
IN
L
=50pF
=
≤
=5V
V
V
SS
IN
Conditions
≤
V
DD
V
V
INJ(PIN)
DD
DD
IN
=5V
=3V
maximum is respected. If V
3)
value. A positive injection is induced by V
10kΩ
0.7xV
V
170
ss
Min
50
1
- 0.3
UNUSED I/O PORT
1)
DD
ST7XXX
PU
Typ
400
400
190
85
25
25
5
current characteristics de-
IN
maximum cannot be
V
0.3xV
DD
230
Max
±25
250
+4
±4
±1
Figure
+ 0.3
1)
DD
76). Data
IN
t
Unit
mV
mA
CPU
µA
kΩ
pF
ns
V
>V
DD
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