EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 187

• Manufacturer Part Number: EASY 6996M CPU
• Description: BOARD EVAL W/CPU ADM6996M
• Manufacturer: Infineon Technologies
• Series: Samurair

Specifications of EASY 6996M CPU

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: ADM6996M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Other names: EASY6996MCPUIN

Field
ANEN
PDN
ISO
ANEN_RST
DPLX
COLTST
SPEED_MSB
Similar Registers
All PHY_Cx registers have the same structure and characteristics, see PHY_C0.
The offset addresses of the other PHY_Cx registers are listed in
Data Sheet
Bits
12
11
10
9
8
7
6
Type
rw
rw
rw
rw, sc
rw
rw
ro
Description
Auto Negotiation Enable
This bit determines whether the link speed should set up by the auto
negotiation process or not. It is set at power up or reset if the RECANEN
pin detects a logic 1 input level in Twisted-Pair Mode.If it is set when fiber
mode is configured, any write to this bit will be ignored .
0
1
Power Down Enable
Setting this bit high puts the PHY into power down mode. During the
power down mode, TXP/TXN and all LED outputs are tristated and the
MII interfaces are isolated.
0
1
Isolate PHY from Network
Setting this control bit isolates the part from the MII, with the exception of
the serial management interface. When this bit is asserted, the PHY does
not respond to TXD, TXEN and TXER inputs, and it presents a high
impedence on its TXC, RXC, CRSDV, RXER, RXD , COL and CRS
outputs.
0
1
Restart Auto Negotiation
Setting this bit while auto negotiation is enabled it forces a new auto
negotiation process to start. This bit is self-clearing and returns to 0 after
the auto negotiation process has commenced.
0
1
Duplex Mode
If auto negotiation is disabled, this bit determines the duplex mode for the
link.
0
1
Collision Test
When set, this bit will cause the COL signal of MII interface to be asserted
in response to the assertion of TXEN.
0
1
Speed Selection MSB
Set to 0 all the time to indicate that the PHY does not support 1000 Mbit/s
function.
B
B
B
B
B
B
B
B
B
B
B
B
Disable Auto negotiation process
Enable auto negotiation process
Normal Operation
Power Down
Normal Operation
Isolate PHY from MII
Normal Operation
Restart Auto Negotiation Process
Half Duplex mode
Full Duplex mode
Disable COL signal test
Enable COL signal test
187
Table
66.
Revision 1.4, 2006-03-24
Registers Description
Samurai-6M/MX
ADM6996M/MX