EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 79

BOARD EVAL W/CPU ADM6996M

EASY 6996M CPU

Manufacturer Part Number
EASY 6996M CPU
Description
BOARD EVAL W/CPU ADM6996M
Manufacturer
Infineon Technologies
Series
Samurair
Datasheet

Specifications of EASY 6996M CPU

Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
ADM6996M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Other names
EASY6996MCPUIN
Memory Map
Table 49
Register
0000
0040
00A0
0200
So you need to divide 10-bit register address to 5-bit PHY address and 5-bit REG address of MDC/MDIO
command to access EEPROM/Counter Register Map. For Samurai PHY Register Map, you can set the 5-bit PHY
address = '10000' and use the standard REG address to access P0~P4 PHY MII Register.
3.5
ADM6996FC is a power-down version to replace ADM6996F and ADM6996M/MX is advanced function version
for new applications.
Pin Description(QFP128)
Table 50
Pin No.
59
60
61
65
Data Sheet
H
H
H
H
~ 003F
~ 009B
~ 02FF
~ 0143
ADM6996M/MX
P5TXD3(SDIO_MD)
P5TXD2(RMIISEL)
P5TXD1(7WIRE)
INT_N
Memory Map
The Hardware Difference between ADM6996M/MX and ADM6996F
Pin Description(QFP128)
H
H
H
H
Definition
EEPROM BAISC Register Map
EEPROM Extended Register Map
Counter and Switch Status Map
PHY Register Map
P5TXD1(P5GPSI)
ADM6996F
P5TXD3(VOL23)
P5TXD2(ROMCODE25
)
VCCIK(1.8V Digital)
79
Notes
For ADM6996FC, SDIO_MD=0 default 32bit mode
For ADM6996M/MX, SDIO_MD=0 default 16bit
mode
Add pull-up/down resistor for ADM6996F/FC/M
compatible design to avoid wrong power-on-latch.
Add pull down resistor for ADM6996F/FC/M P5 MII
mode to avoid wrong power-on-latch.
Add pull down resistor for ADM6996F/FC/M P5 MII
mode to avoid wrong power-on-latch.
Interrupt for Learning Table Access/Port
Security/Counter Overflow/Port Status
Add a option design to CPU INT_N pin
Revision 1.4, 2006-03-24
Function Description
Samurai-6M/MX
ADM6996M/MX

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