EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 29

• Manufacturer Part Number: EASY 6996M CPU
• Description: BOARD EVAL W/CPU ADM6996M
• Manufacturer: Infineon Technologies
• Series: Samurair

Specifications of EASY 6996M CPU

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: ADM6996M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Other names: EASY6996MCPUIN

3
3.1
The Samurai-6M/6MX (ADM6996M/MX) uses the “store & forward” switching approach for the following reasons:
1. Store & forward switches allow switching between different speed media (e.g. 10BaseX and 100BaseX). Such
2. Store & forward switches improve overall network performance by acting as a “network cache”
3. Store & forward switches prevent the forwarding of corrupted packets by the frame check sequence (FCS)
3.1.1
The Samurai-6M/6MX (ADM6996M/MX) receives incoming packets from one of its ports, uses the source address
(SA) and FID to update the address table, and then forwards the packet to the output ports determined by the
destination address (DA) and FID.
If the DA and FID are not found in the address table, the Samurai-6M/6MX (ADM6996M/MX) treats the packet as
a broadcast packet and forwards the packet to the other ports within the same group.
The Samurai-6M/6MX (ADM6996M/MX) can automatically learn the port number of attached network devices
together with the SA and FID of all the incoming packets. If the SA and FID are not found in the address table, the
Samurai-6M/6MX (ADM6996M/MX) adds it to the table.
3.1.2
The Samurai-6M/6MX (ADM6996M/MX) incorporates 6 transmit queues and receive buffer areas for the 6
Ethernet ports. The receive buffers, as well as the transmit queues, are located within the Samurai-6M/6MX
(ADM6996M/MX) along with the switch fabric. The buffers are divided into 192 blocks of 256 bytes each. The
queues of each port are managed according to each port’s read/write pointer.
Input buffers and output queues are maintained through proprietary patent pending UNIQUE (Universal Queue
management) scheme.
3.1.3
When a full duplex port runs out of its receive buffers, a PAUSE command will be issued by Samurai-6M/6MX
(ADM6996M/MX) to notify the packet sender to pause transmission. This frame based flow control is totally
compliant to IEEE 802.3x. When the flow control hardware pin (GFCEN) is set to high, during power on reset, and
per port PAUSE is enabled, Samurai-6M/6MX (ADM6996M/MX) will output and accept 802.3x flow control
packets.
3.1.4
Back-pressure is supported for half-duplex operation. When the Samurai-6M/6MX (ADM6996M/MX) cannot
allocate a receive buffer for the incoming packet (buffer full), the device will transmit a jam pattern on the port, thus
forcing a collision.
3.1.5
The Samurai-6M/6MX (ADM6996M/MX) implements the truncated exponential back off algorithm compliant to the
802.3 standard. Samurai-6M/6MX (ADM6996M/MX) will restart the back off algorithm by choosing 0-9 collision
Data Sheet
switches require large elastic buffers, especially when bridging between a server on a 100 Mbit/s network and
clients on a 10 Mbit/s segment
before forwarding to the destination port
Function Description
Switch Functional Description
Basic Operation
Buffers and Queues
Full Duplex Flow Control
Half Duplex Flow Control
Back-Off Algorithm
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Revision 1.4, 2006-03-24
Function Description
Samurai-6M/MX
ADM6996M/MX