EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 19

• Manufacturer Part Number: EASY 6996M CPU
• Description: BOARD EVAL W/CPU ADM6996M
• Manufacturer: Infineon Technologies
• Series: Samurair

Specifications of EASY 6996M CPU

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: ADM6996M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Other names: EASY6996MCPUIN

Table 3
Ball No.
Port 5 MII Interface
63
61
Data Sheet
IO Signals (cont’d)
Name
GFCEN
MII_P5TXD0
GPSI_P5TXD
RMII_P5TXD0
P5_BUSMD0
MII_P5TXD1
RMII_P5TXD1
Pin
Type
I
O
O
O
I
O
O
Buffer
Type
PU,
LVTTL
4 mA,
PU,
LVTTL
4 mA,
PU,
LVTTL
4 mA,
PU,
LVTTL
PD,
LVTTL
4 mA,
PD,
LVTTL
4 mA,
PD,
LVTTL
Function
Global Flow Control Enable
Value on this pin will be latched by Samurai-6M/6MX
(ADM6996M/MX) at the rising edge of RESETL(RC) as
Flow control enable.
Note: Power On Setting
0
1
Port 5 Transmit Data Bit 0 in MII Mode
The LSB bit of MII Transmit data of port 5. Synchronous to
the rising edge of MII_P5TXCLK.
Port 5 Transmit Data in GPSI Mode
When port 5 is operating in GPSI mode, this pin acts as
GPSI Transmit Data. Synchronous to the rising edge of
GPSI_P5TXCLK.
Port 5 Transmit Data Bit 0 in RMII Mode
When port 5 is operating in RMII mode, this pin acts as RMII
Transmit Data Bit[0]. Synchronous to the rising edge of
REFCLK_IN.
Port 5 Bus Mode Selection Bit 0
Value on this pin will be latched by Samurai-6M/6MX
(ADM6996M/MX) at the rising edge of RESETL(RC) as port
5 bus mode selection bit 0. Combined with P5_BUSMD1,
Samurai-6M/6MX (ADM6996M/MX) provides 3 bus types
for port 5. P5_BUSMD[1:0], Interface
Note: Power On Setting
00
01
10
11
Port 5 Transmit Data Bit 1 in MII Mode
The bit[1] of MII Transmit data of port 5. Synchronous to the
rising edge of MII_P5TXCLK.
Port 5 Transmit Data Bit 1 in RMII Mode
The bit[1] of RMII Transmit data of port 5. Synchronous to
the rising edge of REFCLK_IN.
B
B
19
B
B
B
B
register setting in corresponding port’s Basic Control
Register
Flow Control Capability is depended upon the
All ports flow control capability is enabled
MII
GPSI
RMII
Reserved and not allowed
Revision 1.4, 2006-03-24
Interface Description
Samurai-6M/MX
ADM6996M/MX