EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 21
![BOARD EVAL W/CPU ADM6996M](/photos/9/10/91037/easy_6996m_cpu_sml.jpg)
EASY 6996M CPU
Manufacturer Part Number
EASY 6996M CPU
Description
BOARD EVAL W/CPU ADM6996M
Manufacturer
Infineon Technologies
Series
Samurair
Datasheet
1.EASY_6996M_CPU.pdf
(216 pages)
Specifications of EASY 6996M CPU
Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
ADM6996M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Other names
EASY6996MCPUIN
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Table 3
Ball No.
54
55
56
52
68
57
58
Data Sheet
IO Signals (cont’d)
Name
MII_P5RXD1
RMII_P5RXD1
MII_P5RXD2
MII_P5RXD3
MII_P5RXDV
RMII_P5
CRSDV
MII_P5RXER
RMII_P5RXER
MII_P5CRS
GPSI_P5CRS
MII_P5COL
GPSI_P5COL
Pin
Type
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Type
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
PD,
LVTTL
Function
Port 5 Receive Data Bit 1 in MII Mode
In MII mode, the bit is the bit[1] of MII receive data,
synchronous to the rising edge of MII_P5RXCLK.
Port 5 Receive Data Bit 1 in RMII Mode
In RMII mode, the bit is the MSB of RMII receive data,
synchronous to the rising edge of REFCLK_IN.
Port 5 Receive Data Bit 2 in MII Mode
In MII mode, the bit is the bit[2] of MII receive data.
Synchronous to the rising edge of MII_P5RXCLK.
Port 5 Receive Data Bit 3 in MII Mode
In MII mode, the bit is the bit[3] of MII receive data.
Synchronous to the rising edge of MII_P5RXCLK.
Port 5 Receive Data Valid in MII Mode
Active high to indicate that the data on MII_P5RXD[3:0] is
valid. Synchronous to the rising edge of MII_P5RXCLK.
Port 5 Carrier Sense and Receive Data Valid in RMII
Mode
Active high to indicate that the data on RMII_P5RXD[1:0] is
valid. Synchronous to the rising edge of REFCLK _IN.
Port 5 Receive Error in MII Mode
Active high to indicate that there is symbol error on the
MII_P5RXD[3:0]. Only valid in 100M operation.
Port 5 Receive Error in RMII Mode
Active high to indicate that there is symbol error on the
RMII_P5 RXD[1:0]. Only valid in 100M operation.
Port 5 Carrier Sense in MII Mode
In full duplex mode, MII_P5CRS reflects the receive carrier
sense situation on medium only; In Half Duplex,
MII_P5CRS will be high both in receive and transmit
condition.
Port 5 Carrier Sense in GPSI Mode
In full duplex mode, GPSI_P5CRS reflects the receive
carrier sense situation on medium only; In Half Duplex,
GPSI_P5CRS will be high both in receive and transmit
condition.
Port 5 Collision Input in MII Mode
Active high to indicate that there is collision on the medium.
Stay low in full duplex operation.
Port 5 Collision Input in GPSI Mode
Active high to indicate that there is collision on the medium.
Stay low in full duplex operation.
21
Revision 1.4, 2006-03-24
Interface Description
Samurai-6M/MX
ADM6996M/MX
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