EASY 6996M CPU Infineon Technologies, EASY 6996M CPU Datasheet - Page 36

• Manufacturer Part Number: EASY 6996M CPU
• Description: BOARD EVAL W/CPU ADM6996M
• Manufacturer: Infineon Technologies
• Series: Samurair

Specifications of EASY 6996M CPU

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: ADM6996M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Other names: EASY6996MCPUIN

Table 9
Packets Identified by Samurai-
6M/6MX (ADM6996M/MX)
Others
For learning purpose, Samurai-6M/6MX (ADM6996M/MX) sometimes divides Ethernet address into three groups.
Table 10
Packets Identified by Samurai-
6M/6MX (ADM6996M/MX)
MULTICAST
BROADCAST
UNICAST
3.1.13.1
Samurai-6M/6MX (ADM6996M/MX) supports 4 Spanning Tree Port State (Disable, Blocking/Listening, Learning
and Forwarding state) for every port to enable Spanning Tree Protocol function when co-operates with an external
CPU. These port states are defined in
Samurai-6M/6MX (ADM6996M/MX) supports a function to specify a packet to be treated as a Span Packet. Beside
Disable state, the Span Packets will not be dropped by Spanning Tree Port State settings.
Table 11
Packet Type
BPDU/SLOW/PAE/RESER_R0/
RESER_R1/GXRP/RESER_R2/
RESER_R3
ARP/RARP
IGMP_IP/MLD_IP/MLD_IPV6
Others
3.1.13.2
Samurai-6M/6MX (ADM6996M/MX) reserves some buffers for these packets, so they are not dropped because of
traffic congestion. Management packets are never limited by the bandwidth control, stormed by the storming
control, or dropped due to
Data Sheet
Packet Identification (cont’d)
Packet Identification Groups
Span Packet
Span Packet
Management Packet
TYPE
PROTOCOL
TCPUDP
MAC_CTRL
Smart Discard
The Ether-Type field is 8808
Comments
The Ether-Type field matches one of the type filters.
The Protocol field matches one of the protocol filters.
The TCP/UDP port number matches one of the TCP/UDP filters.
Comments
The first bit of the Ethernet destination address is 1, but not all 1.
The Ethernet destination address is FF FF FF FF FF FF
The first bit of the Ethernet destination address is 0.
Description
The span packet is determined in priority order by:
1. Span bit defined in the Special TAG, when Span_Valid is set.
2. Span bit defined in the learning table when there is a match for DA+FID.
3. Span bit defined in the control table when there is a match for DA.
4. Span bit in register 003E
The span packet is determined in priority order by:
1. Span bit defined in the Special TAG, when Span_Valid is set.
2. Span bit in register 000D
The span packet is determined in priority order by:
1. Span bit defined in the Special TAG, when Span_Valid is set.
2. Span bit in register 000C
The span packet is determined in priority order by:
1. Span bit defined in the Special TAG, when Span_Valid is set.
2. Span bit defined in the learning table when there is a match for DA+FID.If
STPS
the first and second conditions are not satisfied, the frame is classified as
non-span packets.
function.
of EEPROM register 0013
36
H
H
H
H
.
, but OPCODE is not 0001
.
.
H
~ 0018
H
.
Revision 1.4, 2006-03-24
Function Description
H
Samurai-6M/MX
H
ADM6996M/MX
.
.