PIC16F690DM-PCTLHS Microchip Technology, PIC16F690DM-PCTLHS Datasheet - Page 138

BOARD DEMO PICTAIL HUMIDITY SNSR

PIC16F690DM-PCTLHS

Manufacturer Part Number
PIC16F690DM-PCTLHS
Description
BOARD DEMO PICTAIL HUMIDITY SNSR
Manufacturer
Microchip Technology
Series
PICtail™r

Specifications of PIC16F690DM-PCTLHS

Sensor Type
Humidity
Sensing Range
1 ~ 99% RH
Interface
Analog
Voltage - Supply
5V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP6291, PIC16F690
Processor To Be Evaluated
MCP6291 and PIC16F690
Interface Type
ICSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Sensitivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
11.4.1
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCP1/P1A pin, while the complementary PWM
output signal is output on the P1B pin (see
Figure 11-6). This mode can be used for Half-Bridge
applications, as shown in Figure 11-9, or for Full-Bridge
applications, where four power switches are being
modulated with two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
Half-Bridge power devices. The value of the PDC<6:0>
bits of the PWM1CON register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. See
Section 11.4.6 “Programmable Dead-Band Delay
mode” for more details of the dead-band delay
operations.
FIGURE 11-9:
DS41262E-page 136
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
HALF-BRIDGE MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
P1A
P1B
P1A
P1B
FET
Driver
FET
Driver
FET
Driver
FET
Driver
Since the P1A and P1B outputs are multiplexed with
the PORT data latches, the associated TRIS bits must
be cleared to configure P1A and P1B as outputs.
FIGURE 11-8:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
Load
V+
(2)
(2)
2: Output signals are shown as active-high.
(1)
PR2 register.
td
Pulse Width
Load
Period
td
FET
Driver
FET
Driver
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
© 2008 Microchip Technology Inc.
+
-
+
-
(1)
Period
(1)

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