PIC16F690DM-PCTLHS Microchip Technology, PIC16F690DM-PCTLHS Datasheet - Page 44
PIC16F690DM-PCTLHS
Manufacturer Part Number
PIC16F690DM-PCTLHS
Description
BOARD DEMO PICTAIL HUMIDITY SNSR
Manufacturer
Microchip Technology
Series
PICtail™r
Datasheets
1.PIC16F690DM-PCTLHS.pdf
(36 pages)
2.PIC16F690DM-PCTLHS.pdf
(32 pages)
3.PIC16F690DM-PCTLHS.pdf
(306 pages)
4.PIC16F690DM-PCTLHS.pdf
(14 pages)
Specifications of PIC16F690DM-PCTLHS
Sensor Type
Humidity
Sensing Range
1 ~ 99% RH
Interface
Analog
Voltage - Supply
5V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP6291, PIC16F690
Processor To Be Evaluated
MCP6291 and PIC16F690
Interface Type
ICSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Sensitivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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PIC16F631/677/685/687/689/690
2.2.2.7
The PIR2 register contains the interrupt flag bits, as
shown in Register 2-7.
REGISTER 2-7:
DS41262E-page 42
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
OSFIF
R/W-0
PIR2 Register
OSFIF: Oscillator Fail Interrupt Flag bit
1 = System oscillator failed, clock input has changed to INTOSC (must be cleared in software)
0 = System clock operating
C2IF: Comparator C2 Interrupt Flag bit
1 = Comparator output (C2OUT bit) has changed (must be cleared in software)
0 = Comparator output (C2OUT bit) has not changed
C1IF: Comparator C1 Interrupt Flag bit
1 = Comparator output (C1OUT bit) has changed (must be cleared in software)
0 = Comparator output (C1OUT bit) has not changed
EEIF: EE Write Operation Interrupt Flag bit
1 = Write operation completed (must be cleared in software)
0 = Write operation has not completed or has not started
Unimplemented: Read as ‘0’
R/W-0
C2IF
PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-0
C1IF
R/W-0
EEIF
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
U-0
—
software
© 2008 Microchip Technology Inc.
x = Bit is unknown
U-0
should
—
ensure
U-0
—
bit 0
the
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