PIC16F690DM-PCTLHS Microchip Technology, PIC16F690DM-PCTLHS Datasheet - Page 146

BOARD DEMO PICTAIL HUMIDITY SNSR

PIC16F690DM-PCTLHS

Manufacturer Part Number
PIC16F690DM-PCTLHS
Description
BOARD DEMO PICTAIL HUMIDITY SNSR
Manufacturer
Microchip Technology
Series
PICtail™r

Specifications of PIC16F690DM-PCTLHS

Sensor Type
Humidity
Sensing Range
1 ~ 99% RH
Interface
Analog
Voltage - Supply
5V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP6291, PIC16F690
Processor To Be Evaluated
MCP6291 and PIC16F690
Interface Type
ICSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Sensitivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
11.4.6
In Half-Bridge applications where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on, and the
other turned off), both switches may be on for a short
period of time until one switch completely turns off.
During this brief interval, a very high current
(shoot-through current) will flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from
flowing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In Half-Bridge mode, a digitally programmable
dead-band delay is available to avoid shoot-through
current from destroying the bridge power switches. The
delay occurs at the signal transition from the non-active
state to the active state. See Figure 11-8 for illustration.
The lower seven bits of the associated PWM1CON
register (Register 11-3) sets the delay period in terms
of microcontroller instruction cycles (T
FIGURE 11-18:
DS41262E-page 144
Standard Half-Bridge Circuit (“Push-Pull”)
PROGRAMMABLE DEAD-BAND
DELAY MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
CY
or 4 T
P1A
P1B
OSC
).
FET
Driver
FET
Driver
FIGURE 11-17:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
(1)
2: Output signals are shown as active-high.
td
Pulse Width
PR2 register.
Load
Period
td
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
© 2008 Microchip Technology Inc.
+
V
-
+
V
-
(1)
Period
(1)

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