C8051F300DK Silicon Laboratories Inc, C8051F300DK Datasheet - Page 31

• Manufacturer Part Number: C8051F300DK
• Description: DEV KIT F300/301/302/303/304/305
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F300DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F30x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F300
• Silicon Family Name: C8051F30x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F300/001/002
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1246

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Notes: General
Notes: Solder Mask Design
Notes: Stencil Design
Notes: Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
4. A 3 x 1 array of 1.30 x 0.60 mm openings on 0.80 mm pitch should be used for the center
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for
mask and the metal pad is to be 60 µm minimum, all the way around the pad.
assure good solder paste release.
ground pad.
Small Body Components.
Dimension
C1
C2
X1
X2
Y1
Y2
Table 4.3. QFN-11 Landing Diagram Dimensions
E
Figure 4.4. Typical QFN-11 Landing Diagram
Rev. 2.9
MIN
2.75
2.75
0.20
1.40
0.65
2.30
C8051F300/1/2/3/4/5
0.50 BSC
MAX
2.85
2.85
0.30
1.50
0.75
2.40
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