C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 55

KIT DEV FOR C8051F996

C8051F996DK

Manufacturer Part Number
C8051F996DK
Description
KIT DEV FOR C8051F996
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F996DK

Contents
Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
Processor To Be Evaluated
C8051F996
Processor Series
C8051F98x
Interface Type
USB
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F996
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1963
Table 4.4. Reset Electrical Characteristics
V
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
VDD Monitor Threshold
(V
VDD Ramp Time for Power
On
POR Monitor Threshold
(V
Missing Clock Detector
Timeout
Minimum System Clock w/
Missing Clock Detector
Enabled
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Current
DD
DD
DD
RST
POR
= 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Monitor Turn-on Time
Monitor Supply 
)
)
Parameter
Time from last system clock rising edge
Recovery from Brownout (VDD Rising)
System clock frequency which triggers
Delay between release of any reset
Brownout Condition (VDD Falling)
a missing clock detector timeout
(all power modes except Sleep)
execution at location 0x0000
RST = 0.0 V, VDD = 1.8 V
RST = 0.0 V, VDD = 3.6 V
VBAT Ramp from 0–1.8 V
V
V
V
V
source and code
to reset initiation
DD
DD
DD
DD
Early Warning
Reset Trigger
I
OL
Conditions
= 2.0 to 3.6 V
= 0.9 to 2.0 V
= 2.0 to 3.6 V
= 0.9 to 2.0 V
= 1.4 mA,
Rev. 1.0
C8051F99x-C8051F98x
V
0.7 x V
DD
0.45
Min
100
1.8
1.7
15
– 0.6
DD
1.85
1.75
1.75
Typ
650
300
0.7
20
10
4
7
7
0.3 x V
1000
Max
0.6
0.6
1.9
1.8
1.0
30
10
3
DD
Units
kHz
µA
ms
µA
µs
µs
µs
ns
V
V
V
V
V
V
V
55

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