C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 78
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C8051F996DK
Manufacturer Part Number
C8051F996DK
Description
KIT DEV FOR C8051F996
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051F996DK.pdf
(24 pages)
2.C8051F996DK.pdf
(2 pages)
3.C8051F996DK.pdf
(4 pages)
4.C8051F996DK.pdf
(322 pages)
Specifications of C8051F996DK
Contents
Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
Processor To Be Evaluated
C8051F996
Processor Series
C8051F98x
Interface Type
USB
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F996
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1963
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C8051F99x-C8051F98x
5.6.
The ADC Programmable Window Detector continuously compares the ADC0 output registers to user-
programmed limits, and notifies the system when a desired condition is detected. This is especially
effective in an interrupt-driven system, saving code space and CPU bandwidth while delivering faster
system response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be
used in polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH,
ADC0LTL) registers hold the comparison values. The window detector flag can be programmed to indicate
when measured data is inside or outside of the user-programmed limits, depending on the contents of the
ADC0 Less-Than and ADC0 Greater-Than registers.
SFR Definition 5.8. ADC0GTH: ADC0 Greater-Than High Byte
SFR Page = 0x0; SFR Address = 0xC4
SFR Definition 5.9. ADC0GTL: ADC0 Greater-Than Low Byte
SFR Page = 0x0; SFR Address = 0xC3
78
Note: In 8-bit mode, this register should be set to 0x00.
Name
Reset
Name
Reset
Type
Bit
7:0
Type
Bit
7:0
Bit
Bit
AD0GT[7:0] ADC0 Greater-Than Low Byte.
AD0GT[15:8] ADC0 Greater-Than High Byte.
Programmable Window Detector
Name
Name
7
1
7
1
Least Significant Byte of the 16-bit Greater-Than window compare register.
Most Significant Byte of the 16-bit Greater-Than window compare register.
6
1
6
1
5
1
5
1
Rev. 1.0
4
1
4
1
AD0GT[15:8]
AD0GT[7:0]
R/W
R/W
Function
Function
3
1
3
1
2
1
2
1
1
1
1
1
0
1
0
1
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