C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 74

• Manufacturer Part Number: C8051F996DK
• Description: KIT DEV FOR C8051F996
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F996DK

• Contents: Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
• Processor To Be Evaluated: C8051F996
• Processor Series: C8051F98x
• Interface Type: USB
• Operating Supply Voltage: 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F996
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1963

C8051F99x-C8051F98x
SFR Definition 5.3. ADC0AC: ADC0 Accumulator Configuration
SFR Page = 0x0; SFR Address = 0xBA
74
Name AD012BE
Reset
Type
Bit
5:3
2:0
Bit
7
6
AD0SJST[2:0] ADC0 Accumulator Shift and Justify.
AD0RPT[2:0] ADC0 Repeat Count.
AD012BE
R/W
AD0AE
Name
7
0
AD0AE
ADC0 12-Bit Mode Enable.
Enables 12-bit Mode on C8051F980/6 and C8051F990/6 devices.
0: 12-bit Mode Disabled.
1: 12-bit Mode Enabled.
ADC0 Accumulate Enable.
Enables multiple conversions to be accumulated when burst mode is disabled.
0: ADC0H:ADC0L contain the result of the latest conversion when Burst Mode is
disabled.
1: ADC0H:ADC0L contain the accumulated conversion results when Burst Mode
is disabled. Software must write 0x0000 to ADC0H:ADC0L to clear the accumu-
lated result.
This bit is write-only. Always reads 0b.
Specifies the format of data read from ADC0H:ADC0L.
000: Right justified. No shifting applied.
001: Right justified. Shifted right by 1 bit.
010: Right justified. Shifted right by 2 bits.
011: Right justified. Shifted right by 3 bits.
100: Left justified. No shifting applied.
All remaining bit combinations are reserved.
Selects the number of conversions to perform and accumulate in Burst Mode.
This bit field must be set to 000 if Burst Mode is disabled.
000: Perform and Accumulate 1 conversion.
001: Perform and Accumulate 4 conversions.
010: Perform and Accumulate 8 conversions.
011: Perform and Accumulate 16 conversions.
100: Perform and Accumulate 32 conversions.
101: Perform and Accumulate 64 conversions.
All remaining bit combinations are reserved.
W
6
0
5
0
AD0SJST[2:0]
R/W
Rev. 1.0
4
0
Function
3
0
2
0
AD0RPT[2:0]
R/W
1
0
0
0