EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 38

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

ADuC832
ADCCON3 (ADC Control SFR 3)
SFR Address:
SFR Power-On Default Value:
Bit Addressable:
Table 18. ADCCON3 SFR Bit Designations
Bit
[7]
[6]
[5:4]
[3]
[2]
[1]
[0]
Name
Busy
GNCLD
AVGS[1:0]
RSVD
RSVD
Typical
SCAL
Description
The ADC busy status bit is a read-only status bit that is set during a valid ADC conversion or calibration cycle. Busy is
automatically cleared by the core at the end of conversion or calibration.
Gain calibration disable bit. Set to 0 to enable gain calibration. Set to 1 to disable gain calibration.
Number of averages selection bits. These bits select the number of ADC readings averaged during a calibration cycle.
AVGS1
0
0
1
1
Reserved. This bit should always be written as 0.
This bit should always be written as 1 by the user when performing calibration.
Calibration type select bit. This bit selects between offset (zero-scale) and gain (full-scale) calibration.
Set to 0 for offset calibration.
Set to 1 for gain calibration.
Start calibration cycle bit. When set, this bit starts the selected calibration cycle. It is automatically cleared when the
calibration cycle is completed.
F5H
00H
No
AVGS0
0
1
0
1
Rev. A | Page 38 of 92
The ADCCON3 register controls the operation of various
calibration modes as well as giving an indication of ADC busy
status.
Number of Averages
15
1
31
63