EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 73

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

TIMER/COUNTER 2
T2CON (TIMER/COUNTER 2 CONTROL REGISTER)
SFR Address:
Power-On Default Value:
Bit Addressable:
Table 38. T2CON SFR Bit Designations
Bit
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Name
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
CNT2
CAP2
Timer 2 overflow flag.
Set by hardware on a Timer 2 overflow. TF2 is not set when either RCLK = 1 or TCLK = 1.
Cleared by user software.
Timer 2 external flag.
Set by hardware when either a capture or reload is caused by a negative transition on T2EX and EXEN2 = 1.
Cleared by user software.
Receive clock enable bit.
Set by the user to enable the serial port to use Timer 2 overflow pulses for its receive clock in serial port Mode 1 and Mode 3.
Cleared by the user to enable Timer 1 overflow to be used for the receive clock.
Transmit clock enable bit.
Set by the user to enable the serial port to use Timer 2 overflow pulses for its transmit clock in serial port Mode 1 and
Mode 3. Cleared by the user to enable Timer 1 overflow to be used for the transmit clock.
Timer 2 external enable flag.
Set by the user to enable a capture or reload to occur as a result of a negative transition on T2EX if Timer 2 is not being used
to clock the serial port.
Cleared by the user for Timer 2 to ignore events at T2EX.
Timer 2 start/stop control bit.
Set by the user to start Timer 2.
Cleared by the user to stop Timer 2.
Timer 2 timer or counter function select bit.
Set by the user to select counter function (input from external T2 pin).
Cleared by the user to select timer function (input from on-chip core clock).
Timer 2 capture/reload select bit.
Set by the user to enable captures on negative transitions at T2EX if EXEN2 = 1.
Cleared by the user to enable autoreloads with Timer 2 overflows or negative transitions at T2EX when EXEN2 = 1. When
either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to autoreload on Timer 2 overflow.
Description
C8H
00H
Yes
Rev. A | Page 73 of 92
TIMER/COUNTER 2 DATA REGISTERS
Timer/Counter 2 also has two pairs of 8-bit data registers
associated with it. These are used as both timer data registers
and timer capture/reload registers.
TH2 and TL2
TH2 is the Timer 2 data high byte and TL2 is the low byte. The
SFR addresses for TH2 and TL2 are CDH and CCH, respectively.
RCAP2H and RCAP2L
RCAP2H is the Timer 2 capture/reload high byte and RCAP2L
is the low byte. The SFR addresses for RCAP2H and RCAP2L
are CBH and CAH, respectively.
ADuC832