C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 188

• Manufacturer Part Number: C8051F560-TB
• Description: BOARD PROTOTYPE W/C8051F560
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F560-TB

• Contents: Board
• Processor To Be Evaluated: C8051F56x
• Processor Series: C8051F56x
• Interface Type: USB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V to 5.25 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F55x, C8051F56x, C8051F57x
• For Use With: 336-1691 - KIT DEVELOPMENT FOR C8051F560
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1694

C8051F55x/56x/57x
SFR Definition 19.25. P3MDIN: Port 3 Input Mode
SFR Address = 0xF4; SFR Page = 0x0F
SFR Definition 19.26. P3MDOUT: Port 3 Output Mode
SFR Address = 0xAE; SFR Page = 0x0F
188
Note: P3.0 is available on 40-pin and 32-pin packages. P3.1-P3.7 are available on 40-pin packages
Note: P3.0 is available on 40-pin and 32-pin packages. P3.1-P3.7 are available on 40-pin packages
Name
Reset
Name
Reset
7:0
7:0 P3MDOUT[7:0] Output Configuration Bits for P3.7–P3.0 (respectively).
Bit
Bit
Type
Type
Bit
Bit
P3MDIN[7:0]
Name
Name
7
1
7
0
Analog Configuration Bits for P3.7–P3.0 (respectively).
Port pins configured for analog mode have their weak pull-up and digital receiver
disabled. For analog mode, the pin also needs to be configured for open-drain
mode in the P3MDOUT register.
0: Corresponding P3.n pin is configured for analog mode.
1: Corresponding P3.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.1
P3MDOUT[7:0]
4
1
4
0
P3MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
2
1
2
0
1
1
1
0
0
1
0
0