C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 251

• Manufacturer Part Number: C8051F560-TB
• Description: BOARD PROTOTYPE W/C8051F560
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F560-TB

• Contents: Board
• Processor To Be Evaluated: C8051F56x
• Processor Series: C8051F56x
• Interface Type: USB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V to 5.25 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F55x, C8051F56x, C8051F57x
• For Use With: 336-1691 - KIT DEVELOPMENT FOR C8051F560
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1694

SFR Definition 24.3. SPI0CKR: SPI0 Clock Rate
SFR Address = 0xA2; SFR Page = 0x00
SFR Definition 24.4. SPI0DAT: SPI0 Data
SFR Address = 0xA3; SFR Page = 0x00
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Type
Type
Bit
Bit
SPI0DAT[7:0] SPI0 Transmit and Receive Data.
SCR[7:0]
Name
Name
7
0
7
0
SPI0 Clock Rate.
These bits determine the frequency of the SCK output when the SPI0 module is
configured for master mode operation. The SCK clock frequency is a divided ver-
sion of the system clock, and is given in the following equation, where SYSCLK is
the system clock frequency and SPI0CKR is the 8-bit value held in the SPI0CKR
register.
for 0 <= SPI0CKR <= 255
Example: If SYSCLK = 2 MHz and SPI0CKR = 0x04,
The SPI0DAT register is used to transmit and receive SPI0 data. Writing data to
SPI0DAT places the data into the transmit buffer and initiates a transfer when in
Master Mode. A read of SPI0DAT returns the contents of the receive buffer.
f SCK
f SCK
6
0
6
0
=
=
----------------------------- -
2
--------------------------------------------------------------- -
2
2000000
x
x
5
0

5
0

4
SPI0CKR[7:0]
+
SYSCLK
1

Rev. 1.1
SPI0DAT[7:0]
4
0
4
0
SCR[7:0]
f SCK
+
R/W
R/W
1

Function
Function
=
3
0
3
0
200 kHz
C8051F55x/56x/57x
2
0
2
0
1
0
1
0
0
0
0
0
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