C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 87

• Manufacturer Part Number: C8051F560-TB
• Description: BOARD PROTOTYPE W/C8051F560
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F560-TB

• Contents: Board
• Processor To Be Evaluated: C8051F56x
• Processor Series: C8051F56x
• Interface Type: USB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V to 5.25 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F55x, C8051F56x, C8051F57x
• For Use With: 336-1691 - KIT DEVELOPMENT FOR C8051F560
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1694

10.3. CIP-51 Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic l. Future product versions may use these bits to implement new features in which
case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of
the remaining SFRs are included in the sections of the datasheet associated with their corresponding sys-
tem function.
Notes on Registers, Operands and Addressing Modes:
Rn —Register R0–R7 of the currently selected register bank.
@Ri —Data RAM location addressed indirectly through R0 or R1.
rel —8-bit, signed (two’s complement) offset relative to the first byte of the following instruction. Used by
SJMP and all conditional jumps.
direct —8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00–
0x7F) or an SFR (0x80–0xFF).
#data —8-bit constant
#data16 —16-bit constant
bit —Direct-accessed bit in Data RAM or SFR
addr11 —11-bit destination address used by ACALL and AJMP. The destination must be within the
same 2 kB page of program memory as the first byte of the following instruction.
addr16 —16-bit destination address used by LCALL and LJMP. The destination may be anywhere within
the 64 kB program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Rev. 1.1
C8051F55x/56x/57x
87