C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 231
C8051F560-TB
Manufacturer Part Number
C8051F560-TB
Description
BOARD PROTOTYPE W/C8051F560
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.TOOLSTICK560DC.pdf
(302 pages)
Specifications of C8051F560-TB
Contents
Board
Processor To Be Evaluated
C8051F56x
Processor Series
C8051F56x
Interface Type
USB
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V to 5.25 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F55x, C8051F56x, C8051F57x
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1694
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Values Read
1110
1100 0 0 0 A master data or address byte
1000 1 0 X A master data byte was
0 0 X A master START was gener-
0 0 1 A master data or address byte
Current SMbus State
ated.
was transmitted; NACK
received.
was transmitted; ACK
received.
received; ACK requested.
Table 22.4. SMBus Status Decoding
Rev. 1.1
Typical Response Options
Load slave address + R/W into
SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and start
another transfer.
Send repeated START.
Switch to Master Receiver Mode
(clear SI without writing new data
to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last byte,
and send STOP.
Send NACK to indicate last byte,
and send STOP followed by
START.
Send ACK followed by repeated
START.
Send NACK to indicate last byte,
and send repeated START.
Send ACK and switch to Master
Transmitter Mode (write to
SMB0DAT before clearing SI).
Send NACK and switch to Mas-
ter Transmitter Mode (write to
SMB0DAT before clearing SI).
C8051F55x/56x/57x
Values to
Write
0 0 X 1100
1 0 X
0 1 X
0 0 X 1100
0 1 X
1 1 X
1 0 X
0 0 X 1000
0 0 1
0 1 0
1 1 0
1 0 1
1 0 0
0 0 1
0 0 0
1000
1100
1100
1110
1110
1110
1110
1110
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231
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