PIC18F66J11-I/PT Microchip Technology, PIC18F66J11-I/PT Datasheet - Page 136

• Manufacturer Part Number: PIC18F66J11-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 3.837890625KB
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J11 FAMILY
TABLE 10-7:
10.4
PORTC is an 8-bit wide, bidirectional port. Only
PORTC pins, RC2 through RC7, are digital only pins
and can tolerate input voltages up to 5.5V.
PORTC is multiplexed with ECCP, MSSP and EUSART
peripheral functions (Table 10-8). The pins have
Schmitt Trigger input buffers. The pins for ECCP, SPI
and EUSART are also configurable for open-drain out-
put whenever these functions are active. Open-drain
configuration is selected by setting the SPIxOD,
ECCPxOD, and UxOD control bits in the ODCON reg-
isters (see Section 10.1.3 “Pull-up Configuration”
for more information).
RC1 is normally configured as the default peripheral
pin for the ECCP2 module. Assignment of ECCP2 is
controlled by Configuration bit, CCP2MX (default state,
CCP2MX = 1).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an output,
while other peripherals override the TRIS bit to make a
pin an input. The user should refer to the corresponding
peripheral section for the correct TRIS bit settings.
DS39778D-page 136
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
Legend: Shaded cells are not used by PORTB.
Note:
Name
PORTC, TRISC and
LATC Registers
These pins are configured as digital inputs
on any device Reset.
GIE/GIEH PEIE/GIEL TMR0IE
TRISB7
INT2IP
LATB7
RBPU
Bit 7
RB7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
INTEDG0 INTEDG1 INTEDG2 INTEDG3
TRISB6
INT1IP
LATB6
Bit 6
RB6
TRISB5
INT3IE
LATB5
Bit 5
RB5
TRISB4
INT0IE
INT2IE
LATB4
Bit 4
RB4
TRISB3
INT1IE
LATB3
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents, even though a peripheral device
may be overriding one or more of the pins.
EXAMPLE 10-3:
RBIE
Bit 3
RB3
CLRF
CLRF
MOVLW
MOVWF
PORTC
LATC
0CFh
TRISC
TMR0IP
TMR0IF
TRISB2
LATB2
INT3IF
Bit 2
RB2
; Initialize PORTC by
; clearing output
; data latches
; Alternate method to clear
; output data latches
; Value used to initialize
; data direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
TRISB1
INT0IF
INT3IP
INT2IF
INITIALIZING PORTC
LATB1
Bit 1
RB1
© 2009 Microchip Technology Inc.
TRISB0
INT1IF
LATB0
RBIF
RBIP
Bit 0
RB0
on Page:
Values
Reset
61
60
60
57
57
57