PIC18F66J11-I/PT Microchip Technology, PIC18F66J11-I/PT Datasheet - Page 436

• Manufacturer Part Number: PIC18F66J11-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 3.837890625KB
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J11 FAMILY
BTFSC ............................................................................. 344
BTFSS .............................................................................. 344
BTG .................................................................................. 345
BZ ..................................................................................... 346
C
C Compilers
Calibration (A/D Converter) .............................................. 301
CALL ................................................................................ 346
CALLW ............................................................................. 375
Capture (CCP Module) ..................................................... 199
Capture (ECCP Module) .................................................. 209
Capture/Compare/PWM (CCP) ........................................ 197
Clock Sources .................................................................... 35
CLRF ................................................................................ 347
CLRWDT .......................................................................... 347
Code Examples
Code Protection ............................................................... 315
COMF ............................................................................... 348
Comparator ...................................................................... 303
DS39778D-page 436
MPLAB C18 ............................................................. 382
MPLAB C30 ............................................................. 382
Associated Registers ............................................... 201
CCP Pin Configuration ............................................. 199
CCPRxH:CCPRxL Registers ................................... 199
Prescaler .................................................................. 199
Software Interrupt .................................................... 199
Timer1/Timer3 Mode Selection ................................ 199
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 198
CCPRxH Register .................................................... 198
CCPRxL Register ..................................................... 198
Compare Mode. See Compare.
Module Configuration ............................................... 198
Timer Interconnect Configurations ........................... 198
Default System Clock on Reset ................................. 36
Selection Using OSCCON Register ........................... 36
16 x 16 Signed Multiply Routine .............................. 112
16 x 16 Unsigned Multiply Routine .......................... 112
8 x 8 Signed Multiply Routine .................................. 111
8 x 8 Unsigned Multiply Routine .............................. 111
A/D Calibration Routine ........................................... 301
Changing Between Capture Prescalers ................... 199
Computed GOTO Using an Offset Value ................... 69
Erasing a Flash Program Memory Row ..................... 94
Fast Register Stack .................................................... 69
How to Clear RAM (Bank 1) Using Indirect Addressing .
Implementing a Real-Time Clock Using a Timer1 Inter-
Initializing PORTA .................................................... 132
Initializing PORTB .................................................... 134
Initializing PORTC .................................................... 136
Initializing PORTD .................................................... 138
Initializing PORTE .................................................... 141
Initializing PORTF .................................................... 144
Initializing PORTG ................................................... 146
Initializing PORTH .................................................... 148
Initializing PORTJ .................................................... 151
Loading the SSP1BUF (SSP1SR) Register ............. 226
Reading a Flash Program Memory Word .................. 93
Saving STATUS, WREG and BSR Registers in RAM ...
Single-Word Write to Flash Program Memory ........... 97
Writing to Flash Program Memory ............................. 96
Analog Input Connection Considerations ................. 306
83
rupt Service ...................................................... 187
128
Comparator Specifications ............................................... 399
Comparator Voltage Reference ....................................... 311
Compare (CCP Module) .................................................. 200
Compare (ECCP Module) ................................................ 209
Compare (ECCPx Modules)
Computed GOTO ............................................................... 69
Configuration Bits ............................................................ 315
Configuration Mismatch Reset (CM) .................................. 53
Configuration Register Protection .................................... 329
Core Features
CPFSEQ .......................................................................... 348
CPFSGT .......................................................................... 349
CPFSLT ........................................................................... 349
Crystal Oscillator/Ceramic Resonator ................................ 37
Customer Change Notification Service ............................ 433
Customer Notification Service ......................................... 433
Customer Support ............................................................ 433
D
Data Addressing Modes .................................................... 83
Data Memory ..................................................................... 72
Associated Registers ............................................... 310
Configuration ........................................................... 307
Control ..................................................................... 307
Effects of a Reset .................................................... 310
Enable, Input Selection ............................................ 307
Enable, Output Selection ......................................... 307
Interrupts ................................................................. 309
Operation ................................................................. 306
Operation During Sleep ........................................... 310
Reference
Single Comparator ................................................... 306
Accuracy and Error .................................................. 313
Associated Registers ............................................... 313
Configuring .............................................................. 312
Connection Considerations ...................................... 313
Effects of a Reset .................................................... 313
Operation During Sleep ........................................... 313
Associated Registers ............................................... 201
CCPRx Register ...................................................... 200
Pin Configuration ..................................................... 200
Software Interrupt .................................................... 200
Timer1/Timer3 Mode Selection ................................ 200
Special Event Trigger ...................................... 209, 300
Special Event Trigger .............................................. 193
Easy Migration ........................................................... 10
Expanded Memory ....................................................... 9
Extended Instruction Set ............................................. 9
External Memory Bus .................................................. 9
nanoWatt Technology .................................................. 9
Oscillator Options and Features .................................. 9
Comparing Addressing Modes with the Extended In-
Direct ......................................................................... 83
Indexed Literal Offset ................................................ 86
Indirect ....................................................................... 83
Inherent and Literal .................................................... 83
Access Bank .............................................................. 74
Bank Select Register (BSR) ...................................... 72
Extended Instruction Set ........................................... 86
General Purpose Registers ....................................... 74
Memory Map .............................................................. 73
Response Time ............................................... 306
struction Set Enabled ........................................ 87
BSR ................................................................... 88
Instructions Affected .......................................... 86
Mapping Access Bank ....................................... 88
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