PIC18F66J11-I/PT Microchip Technology, PIC18F66J11-I/PT Datasheet - Page 184

• Manufacturer Part Number: PIC18F66J11-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 3.837890625KB
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J11 FAMILY
13.1
Timer1 can operate in one of these modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>). When TMR1CS is cleared
(= 0), Timer1 increments on every internal instruction
FIGURE 13-1:
FIGURE 13-2:
DS39778D-page 184
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T1OSO/T13CKI
Timer1 Operation
T1OSI
T1OSI
Timer1 Oscillator
Timer1 Oscillator
T1OSCEN
T1OSCEN
T1CKPS1:T1CKPS0
T1SYNC
TMR1ON
TIMER1 BLOCK DIAGRAM
T1CKPS1:T1CKPS0
T1SYNC
TMR1ON
TIMER1 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
(1)
(1)
TMR1CS
TMR1CS
(ECCPx Special Event Trigger)
Clear TMR1
(ECCPx Special Event Trigger)
Clear TMR1
Clock
Clock
Internal
F
Internal
F
OSC
OSC
/4
/4
On/Off
1
0
1
0
Timer1 Clock Input
Timer1 Clock Input
Prescaler
Prescaler
1, 2, 4, 8
1, 2, 4, 8
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
When Timer1 is enabled, the RC1/T1OSI and
RC0/T1OSO/T13CKI pins become inputs. This means
the values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
2
2
OSC
TMR1L
TMR1L
/4). When the bit is set, Timer1 increments
8
8
Synchronize
Synchronize
Sleep Input
Sleep Input
Detect
Detect
High Byte
High Byte
TMR1H
TMR1
TMR1
8
© 2009 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
Read TMR1L
1
0
Write TMR1L
Set
TMR1IF
on Overflow
Set
TMR1IF
on Overflow
Timer1
Timer1
On/Off
On/Off