PIC18F66J11-I/PT Microchip Technology, PIC18F66J11-I/PT Datasheet - Page 302

IC PIC MCU FLASH 32KX16 64TQFP

PIC18F66J11-I/PT

Manufacturer Part Number
PIC18F66J11-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F66J11-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
52
Ram Memory Size
3.837890625KB
Cpu Speed
48MHz
No. Of Timers
5
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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PIC18F87J11 FAMILY
TABLE 21-2:
DS39778D-page 302
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
ADRESH
ADRESL
ADCON0
ANCON0
ADCON1
ANCON1
CCP2CON
PORTA
TRISA
PORTF
TRISF
PORTH
TRISH
Legend:
Note 1:
Name
2:
3:
4:
(1)
(1)
(2)
(3)
(2)
(3)
This register is not implemented on 64-pin devices.
Default (legacy) SFR at this address, available when WDTCON<4> = 0.
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
These bits are only available in select oscillator modes (FOSC2 Configuration bit = 0); otherwise, they are
unimplemented.
— = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
TRISA7
GIE/GIEH PEIE/GIEL TMR0IE
A/D Result Register High Byte
A/D Result Register Low Byte
PCFG15
OSCFIF
OSCFIE
OSCFIP
TRISH7
TRISF7
VCFG1
PCFG7
PMPIF
PMPIE
PMPIP
RA7
ADFM
P2M1
Bit 7
RH7
RF7
SUMMARY OF A/D REGISTERS
(4)
(4)
TRISA6
PCFG14
TRISH6
TRISF6
VCFG0
PCFG6
ADCAL
CM2IF
CM2IE
CM2IP
RA6
P2M0
ADIF
ADIE
ADIP
Bit 6
RF6
RH6
(4)
(4)
PCFG13
TRISA5
TRISH5
ACQT2
TRISF5
DC2B1
CM1IE
CM1IP
RC1IE
RC1IP
CM1IF
RC1IF
CHS3
Bit 5
RH5
RA5
RF5
PCFG12
TRISH4
TRISA4
TRISF4
PCFG4
ACQT1
DC2B0
INT0IE
TX1IE
TX1IP
TX1IF
CHS3
Bit 4
RA4
RH4
RF4
CCP2M3
PCFG11
TRISH3
SSP1IF
SSP1IE
SSP1IP
BCL1IF
BCL1IE
BCL1IP
TRISA3
TRISF3
PCFG3
ACQT0
CHS1
RBIE
Bit 3
RA3
RF3
RH3
CCP2M2
PCFG10
TMR0IF
CCP1IE
CCP1IP
CCP1IF
TRISA2
TRISH2
PCFG2
ADCS2
TRISF2
LVDIE
LVDIP
LVDIF
CHS0
Bit 2
RH2
RA2
RF2
GO/DONE
CCP2M1
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISA1
TRISF1
TRISH1
PCFG1
ADCS1
PCFG9
INT0IF
Bit 1
© 2009 Microchip Technology Inc.
RA1
RH1
RF1
CCP2M0
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
TRISH0
TRISA0
PCFG0
ADCS0
PCFG8
ADON
RBIF
Bit 0
RA0
RH0
on Page:
Values
Reset
57
60
60
60
60
60
60
59
59
59
59
59
59
59
61
60
61
60
61
60

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