PIC18F66J11-I/PT Microchip Technology, PIC18F66J11-I/PT Datasheet - Page 175

IC PIC MCU FLASH 32KX16 64TQFP

PIC18F66J11-I/PT

Manufacturer Part Number
PIC18F66J11-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F66J11-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
52
Ram Memory Size
3.837890625KB
Cpu Speed
48MHz
No. Of Timers
5
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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11.4
This section introduces some potential applications for
the PMP module.
FIGURE 11-27:
11.4.2
Partial multiplexing implies using more pins; however,
for a few extra pins, some extra performance can be
achieved. Figure 11-28 shows an example of a mem-
FIGURE 11-28:
FIGURE 11-29:
© 2009 Microchip Technology Inc.
Application Examples
PIC18F
PIC18F
PIC18F
PARTIALLY MULTIPLEXED
MEMORY OR PERIPHERAL
PMA<14:7>
PMD<7:0>
PMD<7:0>
PMD<7:0>
PMALH
PMALL
PMALL
PMWR
PMWR
PMRD
PMALL
PMRD
PMCS
PMCS
PMWR
PMCS
PMRD
EXAMPLE OF A MULTIPLEXED ADDRESSING APPLICATION
EXAMPLE OF A PARTIALLY MULTIPLEXED ADDRESSING APPLICATION
EXAMPLE OF AN 8-BIT MULTIPLEXED ADDRESS AND DATA APPLICATION
A<14:8>
AD<7:0>
ALE
CS
RD
WR
373
373
373
Parallel Peripheral
A<15:8>
A<7:0>
D<7:0>
D<7:0>
A<7:0>
PIC18F87J11 FAMILY
11.4.1
Figure 11-27 demonstrates the hookup of a memory or
other addressable peripheral in Full Multiplex mode.
Consequently, this mode achieves the best pin saving
from the microcontroller perspective. However, for this
configuration, there needs to be some external latches
to maintain the address.
ory or peripheral that is partially multiplexed with an
external latch. If the peripheral has internal latches as
shown in Figure 11-29, then no extra circuitry is
required except for the peripheral itself.
MULTIPLEXED MEMORY OR
PERIPHERAL
A<14:0>
D<7:0>
CE
A<15:0>
D<7:0>
CE
OE
OE
WR
WR
Address Bus
Data Bus
Control Lines
Address Bus
Data Bus
Control Lines
Address Bus
Data Bus
Control Lines
DS39778D-page 175

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