PIC18F4320-I/PT Microchip Technology, PIC18F4320-I/PT Datasheet - Page 340

IC MCU FLASH 4KX16 A/D 44TQFP

PIC18F4320-I/PT

Manufacturer Part Number
PIC18F4320-I/PT
Description
IC MCU FLASH 4KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4320-I/PT

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4320-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4320-I/PT
Manufacturer:
MIC
Quantity:
20 000
Part Number:
PIC18F4320-I/PT229
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2220/2320/4220/4320
TABLE 26-16: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
FIGURE 26-16:
DS39599G-page 338
70
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
TscH2ssH,
TscL2ssH
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
Symbol
DI
DI
B
DO
DO
Requires the use of Parameter # 73A.
Only if Parameter # 71A and # 72A are used.
2
Refer to Figure 26-5 for load conditions.
V2
V2
L2
L2
H2
H2
L2
H
L
H2
L2
R
F
B
R
F
SC
SC
SC
SC
DO
DI
DO
DI
DO
L
L,
H,
L
H,
L
V
V,
Z SS ↑ to SDO Output High-Impedance
SS ↓ to SCK ↓ or SCK ↑ Input
SCK Input High Time (Slave mode)
SCK Input Low Time (Slave mode)
Setup Time of SDI Data Input to SCK Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time (Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge PIC18FXX20
SS ↑ after SCK Edge
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
MSb In
MSb
74
71
75, 76
Characteristic
72
bit 6 - - - - - -1
bit 6 - - - -1
80
Continuous
Single Byte
Continuous
Single Byte
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
PIC18LFXX20
LSb
LSb In
1.25 T
1.25 T
1.5 T
Min
T
100
100
CY
CY
40
40
10
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
© 2007 Microchip Technology Inc.
77
Max Units Conditions
100
25
45
25
50
25
45
25
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)

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