PIC18F4320-I/PT Microchip Technology, PIC18F4320-I/PT Datasheet - Page 73

IC MCU FLASH 4KX16 A/D 44TQFP

PIC18F4320-I/PT

Manufacturer Part Number
PIC18F4320-I/PT
Description
IC MCU FLASH 4KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4320-I/PT

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4320-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4320-I/PT
Manufacturer:
MIC
Quantity:
20 000
Part Number:
PIC18F4320-I/PT229
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
6.0
The Flash program memory is readable, writable and
erasable during normal operation over the entire V
range.
A read from program memory is executed on one byte
at a time. A write to program memory is executed on
blocks of 8 bytes at a time. Program memory is erased
in blocks of 64 bytes at a time. A bulk erase operation
may not be issued from user code.
While writing or erasing program memory, instruction
fetches cease until the operation is complete. The
program memory cannot be accessed during the write
or erase, therefore, code cannot execute. An internal
programming timer terminates program memory writes
and erases.
A value written to program memory does not need to be
a valid instruction. Executing a program memory
location that forms an invalid instruction results in a
NOP.
6.1
In order to read and write program memory, there are
two operations that allow the processor to move bytes
between the program memory space and the data
RAM:
• Table Read (TBLRD)
• Table Write (TBLWT)
FIGURE 6-1:
© 2007 Microchip Technology Inc.
Note 1: Table Pointer points to a byte in program memory.
TBLPTRU
FLASH PROGRAM MEMORY
Table Reads and Table Writes
Table Pointer
TBLPTRH
TABLE READ OPERATION
(1)
TBLPTRL
Program Memory
(TBLPTR)
PIC18F2220/2320/4220/4320
DD
Instruction: TBLRD*
Program Memory
The program memory space is 16 bits wide while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
Table read operations retrieve data from program
memory and place it into TABLAT in the data RAM
space. Figure 6-1 shows the operation of a table read
with program memory and data RAM.
Table write operations store data from TABLAT in the
data memory space into holding registers in program
memory. The procedure to write the contents of the
holding registers into program memory is detailed in
Section 6.5 “Writing to Flash Program Memory”.
Figure 6-2 shows the operation of a table write with
program memory and data RAM.
Table operations work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word aligned. Therefore, a table block can
start and end at any byte address. If a table write is being
used to write executable code into program memory,
program instructions will need to be word-aligned
(TBLPTRL<0> = 0).
The EEPROM on-chip timer controls the write and
erase times. The write and erase voltages are gener-
ated by an on-chip charge pump rated to operate over
the voltage range of the device for byte or word
operations.
Table Latch (8-bit)
TABLAT
DS39599G-page 71

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