MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 162

IC MPU 32BIT COLDF 256-MAPBGA

MCF5216CVF66

Manufacturer Part Number
MCF5216CVF66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5216CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Operating Temperature Range
-40°C To +85°C
No. Of Pins
256
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
142
Interface Type
QSPI/UART/I2C/CAN
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Address
System Control Module (SCM)
8-10
Reset
Reset
Field
Field
R/W
R/W
31–26
23–22
21–20
19–18
17–16
Bits
25
24
15
31
15
BCR24BIT
M2_P_EN
M3_PRTY
M2_PRTY
M0_PRTY
M1_PRTY
FIXED
Name
14
TIMEOUT PRKLAST
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 8-7. Default Bus Master Park Register (MPARK)
Reserved, should be cleared.
DMA bandwith control enable
0 disable the use of the DMA's bandwidth control to elevate the priority of its bus requests.
1 enable the use of the DMA's bandwidth control to elevate the priority of its bus requests.
Enables the use of 24 bit byte count registers in the DMA module
0 DMA BCRs function as 16 bit counters.
1 DMA BCRs function as 24 bit counters.
Master priority level for master 3 (Fast Ethernet Controller)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Note: Reserved on the MCF5214 and MCF5216
Master priority level for master 2 (DMA Controller)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Master priority level for master 0 (ColdFire Core)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Master priority level for master 1 (Not used in user mode)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Reserved, should be cleared.
13
Table 8-6. MPARK Field Description
12
11
0011_0000_1110_0001
0000_0000_0000_0000
26
LCKOUT_TIME
IPSBAR + 0x01C
M2_P_EN BCR24BIT M3_PRTY M2_PRTY M0_PRTY M1_PRTY
25
R/W
R/W
Description
24
8
23
7
22
21
Freescale Semiconductor
20
19
18
17
16
0

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