MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 529

• Manufacturer Part Number: MCF5216CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5216CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Operating Temperature Range: -40°C To +85°C
• No. Of Pins: 256
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Chapter 27
Chip Configuration Module (CCM)
The chip configuration module (CCM) controls the chip configuration and operating mode.
27.1
The CCM performs these operations.
27.2
The CCM configures the chip for two modes of operation:
The operating mode is determined at reset and cannot be changed thereafter.
27.2.1
In master mode, the central processor unit (CPU) can access external memories and peripherals. The
external bus consists of a 32-bit data bus and 24 address lines. The available bus control signals include
R/W, TS, TIP, TSIZ[1:0], TA, TEA, OE, and BS[3:0]. Up to seven chip selects can be programmed to
select and control external devices and to provide bus cycle termination. When interfacing to 16-bit ports,
the port C and D pins and PJ[5:4] (BS[1:0]) can be configured as general-purpose input/output (I/O), and
when interfacing to 8-bit ports, the ports B, C and D pins and PJ[7:5] (BS[3:1]) can be configured as
general purpose input/output (I/O).
27.2.2
In single-chip mode, all memory is internal to the chip. All external bus pins are configured as general
purpose I/O.
Freescale Semiconductor
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Selects the chip operating mode:
— Master mode
— Single-chip mode
Selects external clock or phase-lock loop (PLL) mode with internal or external reference
Selects output pad drive strength
Selects boot device and data port size
Selects bus monitor configuration
Selects low-power configuration
Selects transfer size function of the external bus
Selects processor status (PSTAT) and processor debug data (DDATA) functions
Selects BDM or JTAG mode
Master mode
Single-chip mode
Features
Modes of Operation
Master Mode
Single-Chip Mode
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
27-1