MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 583

IC MPU 32BIT COLDF 256-MAPBGA

MCF5216CVF66

Manufacturer Part Number
MCF5216CVF66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5216CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Operating Temperature Range
-40°C To +85°C
No. Of Pins
256
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
142
Interface Type
QSPI/UART/I2C/CAN
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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28.8.2
The queue operation boundary conditions are:
Freescale Semiconductor
The first CCW in a queue specifies channel 63, the end-of-queue (EOQ) code. The queue becomes
active and the first CCW is read. The end-of-queue is recognized, the completion flag is set, and
the queue becomes idle. A conversion is not performed.
BQ2 (beginning of queue 2) is set at the end of the CCW table (63) and a trigger event occurs on
queue 2. The end-of-queue condition is recognized, a conversion is performed, the completion flag
is set, and the queue becomes idle.
BQ2 is set to CCW0 and a trigger event occurs on queue 1. After reading CCW0, the end-of-queue
condition is recognized, the completion flag is set, and the queue becomes idle. A conversion is not
performed.
Boundary Conditions
Q2:
TRIGGER CAPTURED, RESPONSE DELAYED AFTER FREEZE
T2
Q1:
C1
T1
Q2:
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
C1
C2
T2
C1
C2
T2
C3
C2
Figure 28-39. CCW Freeze Situation 17
Figure 28-40. CCW Freeze Situation 18
Figure 28-41. CCW Freeze Situation 19
C3
C4
Q1:
PF2
T1
C1
TRIGGERS IGNORED
T2
C2
FREEZE
FREEZE
FREEZE
C4
Q2:
CF1
C1
Queued Analog-to-Digital Converter (QADC)
C3
T2
C2
C3
C4
C3
CF1
C4
CF2
C4
C4
CF2
CF2
28-45

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