MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 724

• Manufacturer Part Number: MCF5216CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5216CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Operating Temperature Range: -40°C To +85°C
• No. Of Pins: 256
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Register Memory Map
A-12
IPSBAR + 0x10EC
IPSBAR + 0x10C4
IPSBAR + 0x10E4
IPSBAR + 0x10E8
IPSBAR + 0x1004
IPSBAR + 0x1008
IPSBAR + 0x1010
IPSBAR + 0x1014
IPSBAR + 0x1024
IPSBAR + 0x1040
IPSBAR + 0x1044
IPSBAR + 0x1064
IPSBAR + 0x1084
IPSBAR + 0xDEC
IPSBAR + 0xDFC
IPSBAR + 0xD5A
IPSBAR + 0xDE0
IPSBAR + 0xDE4
IPSBAR + 0xDE8
IPSBAR + 0xDF0
IPSBAR + 0xDF4
IPSBAR + 0xDF8
IPSBAR + 0xFEC
IPSBAR + 0xFFC
IPSBAR + 0xFE0
IPSBAR + 0xFE4
IPSBAR + 0xFE8
IPSBAR + 0xFF0
IPSBAR + 0xFF4
IPSBAR + 0xFF8
Address
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Global Software Interrupt Acknowledge Register
Global Level 1 Interrupt Acknowledge Register
Global Level 2 Interrupt Acknowledge Register
Global Level 3 Interrupt Acknowledge Register
Global Level 4 Interrupt Acknowledge Register
Global Level 5 Interrupt Acknowledge Register
Global Level 6 Interrupt Acknowledge Register
Global Level 7 Interrupt Acknowledge Register
Table A-3. Register Memory Map (continued)
Software Interrupt Acknowledge Register 1
Level 1 Interrupt Acknowledge Register 1
Level 2 Interrupt Acknowledge Register 1
Level 3 Interrupt Acknowledge Register 1
Level 4 Interrupt Acknowledge Register 1
Level 5 Interrupt Acknowledge Register 1
Level 6 Interrupt Acknowledge Register 1
Level 7 Interrupt Acknowledge Register 1
Global Interrupt Acknowledge Cycle Registers
Transmit Descriptor Active Register
Receive Descriptor Active Register
Physical Address High+ Type Field
(Reserved for MCF5214 and MCF5216)
Interrupt Control Register 1-26
MIB Control/Status Register
MII Speed Control Register
Opcode + Pause Duration
Ethernet Control Register
Transmit Control Register
Receive Control Register
Interrupt Event Register
Interrupt Mask Register
Physical Address Low
MII Data Register
Name
FEC Registers
GSWACKR
Mnemonic
SWACKR1
GL1IACKR
GL2IACKR
GL3IACKR
GL4IACKR
GL5IACKR
GL6IACKR
GL7IACKR
L1IACKR1
L2IACKR1
L3IACKR1
L4IACKR1
L5IACKR1
L6IACKR1
L7IACKR1
ICR126
MDATA
MSCR
RDAR
XDAR
PAUR
EIMR
MIBC
PALR
ECR
RCR
OPD
TCR
EIR
Freescale Semiconductor
Size
32
32
32
32
32
32
32
32
32
32
32
32
32
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8