MFRC53001T/0FE,112 NXP Semiconductors, MFRC53001T/0FE,112 Datasheet - Page 33

• Manufacturer Part Number: MFRC53001T/0FE,112
• Description: IC MIFARE HS READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC53001T/0FE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B, ISO15693
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2223-5; 935269692112; MFRC530; MFRC53T0FED

NXP Semiconductors
MFRC530_33
Product data sheet
PUBLIC
9.10.2.2 Amplifier
9.10.2.3 Correlation circuitry
9.10.2.4 Evaluation and digitizer circuitry
The demodulated signal must be amplified by the variable amplifier to achieve the best
performance. The gain of the amplifiers can be adjusted using the RxControl1 register
Gain[1:0] bits; see
Table 28.
See
The correlation circuitry calculates the degree of matching between the received and an
expected signal. The output is a measure of the amplitude of the expected signal in the
received signal. This is done for both, the Q and I-channels. The correlator provides two
outputs for each of the two input channels, resulting in a total of four output signals.
The correlation circuitry needs the phase information for the incoming card signal for
optimum performance. This information is defined for the microprocessor using the
BitPhase register. This value defines the phase relationship between the transmitter and
receiver clock in multiples of the BitPhase time (t
The correlation results are evaluated for each bit-half of the Manchester encoded signal.
The evaluation and digitizer circuit decides from the signal strengths of both bit-halves, if
the current bit is valid
Select the following levels for optimal performance using RxThreshold register bits:
After data transmission, the card is not allowed to send its response before a preset time
period which is called the frame guard time in the ISO/IEC 14443 standard. The length of
this time period is set using the RxWait register’s RxWait[7:0] bits. The RxWait register
defines when the receiver is switched on after data transmission to the card in multiples of
one bit duration.
If bit RcvClkSelI is set to logic 1, the I-clock is used to clock the correlator and evaluation
circuits. If bit RcvClkSelI is set to logic 0, the Q-clock is used.
Register setting
00
01
10
11
•
•
•
•
Table 84 “RxControl1 register bit descriptions” on page 59
If the bit is valid, its value is identified
If the bit is not valid, it is checked to identify if it contains a bit-collision
MinLevel[3:0]: defines the minimum signal strength of the stronger bit-halve’s signal
which is considered valid.
CollLevel[3:0]: defines the minimum signal strength relative to the amplitude of the
stronger half-bit that has to be exceeded by the weaker half-bit of the Manchester
encoded signal to generate a bit-collision. If the signal’s strength is below this value,
logic 1 and logic 0 can be determined unequivocally.
Gain factors for the internal amplifier
All information provided in this document is subject to legal disclaimers.
Table
Rev. 3.3 — 6 July 2010
28.
057433
Gain factor (dB)
(simulation results)
20
24
31
35
BitPhase
) = 1 / 13.56 MHz.
for additional information.
ISO/IEC 14443 A Reader IC
MFRC530
© NXP B.V. 2010. All rights reserved.
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