MFRC53001T/0FE,112 NXP Semiconductors, MFRC53001T/0FE,112 Datasheet - Page 46

IC MIFARE HS READER 32-SOIC

MFRC53001T/0FE,112

Manufacturer Part Number
MFRC53001T/0FE,112
Description
IC MIFARE HS READER 32-SOIC
Manufacturer
NXP Semiconductors
Series
MIFARE®r
Datasheets

Specifications of MFRC53001T/0FE,112

Rf Type
Read Only
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B, ISO15693
Package / Case
32-SOIC (0.300", 7.50mm Width)
Product
RFID Readers
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2223-5
935269692112
MFRC530
MFRC53T0FED

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MFRC53001T/0FE,112
Manufacturer:
MICROCHIP
Quantity:
12 000
NXP Semiconductors
MFRC530_33
Product data sheet
PUBLIC
10.5.1.1 Page register
10.5.1.2 Command register
10.5.1 Page 0: Command and status
10.5 Register descriptions
Selects the page register.
Table 39.
Table 40.
Starts and stops the command execution.
Table 41.
Table 42.
Bit
Symbol
Access
Bit
7
6 to 3
2 to 0
Bit
Symbol
Access
Bit
7
6
5 to 0
Symbol
IFDetectBusy
0
Command[5:0]
Symbol
UsePageSelect 1
0000
PageSelect[2:0] -
Page register (address: 00h, 08h, 10h, 18h, 20h, 28h, 30h, 38h)
reset value: 1000 0000b, 80h bit allocation
Page register bit descriptions
Command register (address: 01h) reset value: x000 0000b, x0h bit allocation
Command register bit descriptions
All information provided in this document is subject to legal disclaimers.
UsePageSelect
IFDetectBusy
R/W
7
R
7
Rev. 3.3 — 6 July 2010
Value
0
1
-
-
Value
0
-
057433
Description
shows the status of interface detection logic
interface detection finished successfully
interface detection ongoing
reserved
Reading this register shows which command is being
executed.
activates a command based on the Command code.
Description
the value of PageSelect[2:0] is used as the register address
A5, A4, and A3. The LSBs of the register address are
defined using the address pins or the internal address latch,
respectively.
the complete content of the internal address latch defines
the register address. The address pins are used as
described in
reserved
when UsePageSelect = logic 1, the value of PageSelect is
used to specify the register page (A5, A4 and A3 of the
register address)
R
6
0
6
5
5
0000
Table 5 on page
R/W
4
4
Command[5:0]
3
3
ISO/IEC 14443 A Reader IC
8.
D
R/W
2
2
MFRC530
PageSelect[2:0]
© NXP B.V. 2010. All rights reserved.
R/W
1
1
46 of 115
R/W
0
0

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