WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 18

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WJLXT972MLC.A4 S L7U9

Manufacturer Part Number
WJLXT972MLC.A4 S L7U9
Description
Manufacturer
Intel
Datasheet

Specifications of WJLXT972MLC.A4 S L7U9

Lead Free Status / RoHS Status
Compliant
Intel
18
Table 8.
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Note:
Table 8
Pull-up/pull-down resistors of 10k Ohms can be implemented if LEDs are not used in the design.
Intel
LQFP
Pin#
12
26
27
28
4
2
3
®
LXT972M Transceiver Configuration and LED Driver Signal Descriptions
lists signal descriptions of the LXT972M Transceiver configuration and LED driver pins.
REFCLK/XI
LED/CFG3
LED/CFG2
LEDCFG1
RESET_L
Symbol
RBIAS
XO
AI and
Type
AO
I/O
AI
I
Reset.
This active Low input is ORed with the control register Reset
bit (Register bit 0.15). The LXT972M Transceiver reset cycle
is extended to 258 μs (nominal) after reset is de-asserted.
Reference Current Bias.
This pin provides bias current for the internal circuitry. Must
be tied to ground through a 22.1 kΩ, 1% resistor.
Reference Clock Input / Crystal Input and Crystal Output.
A 25 MHz crystal oscillator circuit can be connected across XI
and XO. A clock can also be used at XI. Refer to
5.3.2, “Clock Requirements” on page 28
Description section.
LED Drivers 1-3.
These pins drive LED indicators. Each LED can display one
of several available status conditions as selected by the LED
Configuration Register. (For details, see
Configuration Register - Address 20, Hex 14” on page
Configuration Inputs 1-3.
These pins also provide initial configuration settings. (For
details, see
Intel® LXT972M Transceiver” on page 33.)
Table 13, “Hardware Configuration Settings for
Signal Description
Table 54, “LED
in the Functional
Document Number: 302875-005
Revision Date: 27-Oct-2005
Section
87.)
Datasheet

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