WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 75

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

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8.0
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 40. Register Set for IEEE Base Registers
Register Definitions - IEEE Base Registers
This chapter includes definitions for the IEEE base registers used by the LXT972M Transceiver.
Chapter 9.0, “Register Definitions - Product-Specific Registers”
product-specific LXT972M Transceiver registers, which are defined in accordance with the IEEE
802.3 standard for adding unique device functions.
The LXT972M Transceiver register set has multiple 16-bit registers.
•
•
Address
11 to 14
Table 40
Table 41
which are defined in accordance with the “Reconciliation Sublayer and Media Independent
Interface” and “Physical Layer Link Signaling for 10/100 Mbps Auto-Negotiation” sections of
the IEEE 802.3 standard.
10
15
0
1
2
3
4
5
6
7
8
9
Control Register
Status Register #1
PHY Identification Register 1
PHY Identification Register 2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Base Page Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page Transmit Register
Auto-Negotiation Link Partner Next Page Receive Register
1000BASE-T/100BASE-T2 Control Register
1000BASE-T/100BASE-T2 Status Register
Reserved
Extended Status Register
is a register set listing of the IEEE base registers.
through
Table 49
Intel
provide bit descriptions of the base registers (address 0 through 8),
Register Name
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
includes definitions of additional
See
See
See
See
See
See
See
See
See
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Table 41
Table 42.
Table 43.
Table 44.
Table 45
Table 46.
Table 47.
Table 48.
Table 49.
Bit Assignments
75