WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 73

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Figure 32. Intel
Table 38. Intel
Voltage threshold
Power Up delay
1. Typical values are at 25° C and are for design aid only, not guaranteed, and not subject to production
2. Power-up delay is specified as a maximum value because it refers to the PHY guaranteed performance.
testing.
The PHY comes out of reset after a delay of no more than 300 μ s. System designers should consider this
value as a minimum value. After threshold v1 is reached, the MAC should delay no less than 300 μ s before
accessing the MDIO port.
®
®
LXT972M Transceiver Power-Up Timing
Parameter
LXT972M Transceiver Power-Up Timing
MDIO, and
2
so on
VCC
Symbol
v1
t1
Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Min
–
–
v1
Typ
2.9
–
1
Max
300
–
t1
Units
μ s
B3494-01
V
Test Conditions
–
–
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