WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 19

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 9.
Table 10. Intel
Note: If a JTAG port is not used, these pins do not need to be terminated.
Table 9
Intel
Table 10
13
5, 9, 24,
25, 30,
38
6, 29
16
39
7, 8
LQFP
Pin#
LQFP
Pin#
19
20
21
22
23
®
®
LXT972M Transceiver Power, Ground, No-Connect Signal Descriptions
LXT972M Transceiver JTAG Test Signal Descriptions
lists signal descriptions of the LXT972M Transceiver power, ground, and no-connect pins.
lists signal descriptions of LXT972M Transceiver Joint Test Action Group (JTAG) pins.
TDI
TDO
TMS
TCK
TRST_L
GNDA
GND
VCCIO
VCCA
VCCD
NC
Symbol
Symbol
Type
Type
O
I
I
I
I
–
–
–
–
–
–
Intel
Analog Ground.
Ground Input/Output.
Ground return for digital I/O circuits (VCCIO).
MII Power.
Requires either a 3.3 V or a 2.5 V supply. Must be supplied
from the same source used to power the MAC on the other
side of the MII.
For the LXT972M Transceiver, VCCIO is 3.3 V.
Analog Power.
Requires a 3.3 V power supply.
Digital Power.
Requires a 3.3 V power supply.
No Connection.
These pins are not used and must not be terminated.
Test Data Input.
Test data sampled with respect to the rising edge of TCK.
Test Data Output.
Test data driven with respect to the falling edge of TCK.
Test Mode Select.
Test Clock.
Clock input for boundary scan.
Test Reset.
This active-low test reset input is sourced by ATE.
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Signal Description
Signal Description
19