WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 23

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

5.2
5.2.1
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Network Media / Protocol Support
This section includes the following:
The LXT972M Transceiver supports both 10BASE-T and 100BASE-TX Ethernet over twisted-
pair.
10/100 Network Interface
The network interface port consists of two differential signal pairs. For specific pin assignments,
see
The LXT972M Transceiver output drivers can generate one of the following outputs:
When not transmitting data, the LXT972M Transceiver generates IEEE 802.3-compliant link
pulses or idle code. Depending on the mode selected, input signals are decoded as one of the
following:
When not transmitting data, the LXT972M Transceiver generates IEEE 802.3-compliant link
pulses or idle code. Depending on the mode selected, input signals are decoded as one of the
following:
Auto-negotiation/parallel detection or manual control is used to determine the speed of this
interface.
•
•
•
•
•
•
•
Chapter 4.0, “Signal Descriptions for Intel® LXT972M
Section 5.2.1, “10/100 Network Interface”
Section 5.2.2, “MII Data Interface”
Section 5.2.3, “Configuration Management Interface”
100BASE-TX
10BASE-T
100BASE-TX
10BASE-T
Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Transceiver”.
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