PIC18F65K90T-I/PT Microchip Technology, PIC18F65K90T-I/PT Datasheet - Page 200

32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R

PIC18F65K90T-I/PT

Manufacturer Part Number
PIC18F65K90T-I/PT
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F65K90T-I/PT

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
 Details

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Part Number:
PIC18F65K90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K90 FAMILY
14.2
Timer2 can also generate an optional device interrupt.
The Timer2 output signal (TMR2 to PR2 match) pro-
vides the input for the 4-bit output counter/postscaler.
This counter generates the TMR2 match interrupt flag,
which is latched in TMR2IF (PIR1<1>). The interrupt is
enabled by setting the TMR2 Match Interrupt Enable
bit, TMR2IE (PIE1<1>).
A range of 16 postscaler options (from 1:1 through 1:16
inclusive) can be selected with the postscaler control
bits, T2OUTPS<3:0> (T2CON<6:3>).
FIGURE 14-1:
TABLE 14-1:
DS39957D-page 200
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Name
T2OUTPS<3:0>
T2CKPS<1:0>
F
OSC
/4
Timer2 Interrupt
Timer2 Register
Timer2 Period Register
Bit 7
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
TIMER2 BLOCK DIAGRAM
Internal Data Bus
ADIF
ADIE
ADIP
Bit 6
1:1, 1:4, 1:16
2
Prescaler
TMR0IE
RC1IE
RC1IP
RC1IF
Bit 5
4
TMR2
INT0IE
TX1IE
TX1IP
TX1IF
Bit 4
Reset
8
SSP1IE
SSP1IP
SSP1IF
RBIE
Bit 3
14.3
The unscaled output of TMR2 is available primarily to
the ECCP modules, where it is used as a time base for
operations in PWM mode.
Timer2 can optionally be used as the shift clock source
for the MSSP modules operating in SPI mode.
Additional information is provided in
“Master Synchronous Serial Port (MSSP)
Comparator
1:1 to 1:16
Postscaler
8
TMR2/PR2
Match
Timer2 Output
TMR1GIF
TMR1GIE
TMR1GIP
TMR0IF
Bit 2
 2009-2011 Microchip Technology Inc.
TMR2IF
TMR2IE
TMR2IP
INT0IF
Bit 1
PR2
8
Set TMR2IF
TMR2 Output
(to PWM or MSSPx)
TMR1IE
TMR1IP
TMR1IF
Bit 0
RBIF
Section 21.0
Module”.
on Page:
Values
Reset
75
77
77
77
76
76
76

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