PIC18F65K90T-I/PT Microchip Technology, PIC18F65K90T-I/PT Datasheet - Page 255

• Manufacturer Part Number: PIC18F65K90T-I/PT
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90T-I/PT

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Details

19.2
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
ECCPx pin. An event is defined as one of the following:
• Every falling edge
• Every rising edge
• Every fourth rising edge
• Every 16
The event is selected by the mode select bits,
CCPxM<3:0> (CCPxCON register<3:0>). When a
capture is made, the interrupt request flag bit, CCPxIF,
is set (see
software. If another capture occurs before the value in
the CCPRxH/L register is read, the old captured value
is overwritten by the new captured value.
TABLE 19-2:
19.2.1
In Capture mode, the appropriate ECCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
FIGURE 19-1:
 2009-2011 Microchip Technology Inc.
ECCP Module
Note:
ECCP1 Pin
1
2
3
Capture Mode
th
ECCP PIN CONFIGURATION
If the ECCPx pin is configured as an
output, a write to the PORT can cause a
capture condition.
Table
rising edge
19-2). The flag must be cleared by
ECCP1/2/3 INTERRUPT FLAG
BITS
CCP1CON<3:0>
Prescaler
 1, 4, 16
CAPTURE MODE OPERATION BLOCK DIAGRAM
Q1:Q4
PIR3<1>
PIR3<2>
PIR4<0>
Flag Bit
4
Edge Detect
4
and
Set CCP1IF
C1TSEL0
C1TSEL1
C1TSEL2
C1TSEL0
C1TSEL1
C1TSEL2
PIC18F87K90 FAMILY
19.2.2
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode
or Synchronized Counter mode. In Asynchronous
Counter mode, the capture operation may not work.
The timer to be used with each ECCP module is
selected in the CCPTMRS0 register
19.2.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false interrupts.
The interrupt flag bit, CCPxIF, should also be cleared
following any such change in operating mode.
19.2.4
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
ECCP module is turned off, or Capture mode is
disabled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler.
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 19-1:
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ; Load WREG with the
CCP1CON
TIMER1/TIMER3 MODE SELECTION
SOFTWARE INTERRUPT
ECCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
; Turn ECCP module off
; new prescaler mode
; value and ECCP ON
; Load CCP1CON with
; this value
Example 19-1
TMR3
Enable
TMR1
Enable
CCPR1H
TMR3H
TMR1H
DS39957D-page 255
(Register
CCPR1L
TMR1L
TMR3L
provides the
19-2).