PIC18F65K90T-I/PT Microchip Technology, PIC18F65K90T-I/PT Datasheet - Page 274

• Manufacturer Part Number: PIC18F65K90T-I/PT
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90T-I/PT

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Details

PIC18F87K90 FAMILY
20.1
The LCD driver module has 32 registers:
• LCD Control Register (LCDCON)
• LCD Phase Register (LCDPS)
• LCD Reference Ladder Register (LCDRL)
• LCD Reference Voltage Control Register
• Six LCD Segment Enable Registers
• 24 LCD Data Registers
REGISTER 20-1:
DS39957D-page 274
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1-0
(LCDREF)
(LCDSE5:LCDSE0)
(LCDDATA23:LCDDATA0)
LCDEN
R/W-0
LCD Registers
LCDEN: LCD Driver Enable bit
1 = LCD driver module is enabled
0 = LCD driver module is disabled
SLPEN: LCD Driver Enable in Sleep mode bit
1 = LCD driver module is disabled in Sleep mode
0 = LCD driver module is enabled in Sleep mode
WERR: LCD Write Failed Error bit
1 = LCDDATAx register is written while WA (LCDPS<4>) = 0 (must be cleared in software)
0 = No LCD write error
Unimplemented: Read as ‘0’
CS<1:0>: Clock Source Select bits
00 = (F
01 = SOSC oscillator/32
1x = INTRC (31.25 kHz)/32
LMUX<1:0>: Commons Select bits
LMUX<1:0>
SLPEN
R/W-0
LCDCON: LCD CONTROL REGISTER
OSC
00
01
10
11
/4)/8192
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
WERR
R/C-0
1/2 (COM<1:0>)
1/3 (COM<2:0>)
1/4 (COM<3:0>)
Static (COM0)
Multiplex
U-0
—
Number of Pixels
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(PIC18F6X90)
Maximum
R/W-0
The LCDCON register, shown in
controls the overall operation of the module. Once the
module is configured, the LCDEN (LCDCON<7>) bit is
used to enable or disable the LCD module. The LCD
panel can also operate during Sleep by clearing the
SLPEN (LCDCON<6>) bit.
The
configures the LCD clock source prescaler and the type
of waveform, Type-A or Type-B. For details on these
features, see
Selection”,
Section 20.8 “LCD Waveform
CS1
132
33
66
99
LCDPS
Section 20.3 “LCD Bias Types”
R/W-0
Number of Pixels
CS0
Section 20.2 “LCD Clock Source
register,
(PIC18F8X90)
Maximum
 2009-2011 Microchip Technology Inc.
144
192
48
96
x = Bit is unknown
shown
LMUX1
R/W-0
Generation”.
in
1/2 or 1/3
1/2 or 1/3
Register
Register
Static
Bias
1/3
LMUX0
R/W-0
20-1,
20-2,
bit 0
and