LSISAS1064 LSI, LSISAS1064 Datasheet - Page 106

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

4-38
31
31
0
0
0
x
0
x
0
x
0
x
0
x
0
x
Register: 0x14
Diagnostic Read/Write Address
Read/Write
The Diagnostic Read/Write Address register specifies a Dword location
on the internal bus. The address increments by a Dword whenever the
host system accesses the
register is only accessible through PCI I/O Space and returns
0xFFFFFFFF if read through PCI Memory Space. The host can enable
write access to this register by writing the correct Write I/O Key to the
Write Sequence
bit, of the
correct Write I/O Key to the
access to this register.
Register: 0x30
Host Interrupt Status
Read/Write
The Host Interrupt Status register provides read only interrupt status
information to the PCI Host. A write to this register of any value clears
the associated System Doorbell interrupt.
PCI Host Register Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
24 23
24 23
0
x
0
x
0
x
0
x
Host Diagnostic
0
x
Diagnostic Read/Write Address
Diagnostic Read/Write Address
This register holds the address that the
Read/Write Data
IOP Doorbell Status
The LSISAS1064 sets this bit when the IOP receives a
message from the system doorbell but has yet to process
it. The IOP processes the System Doorbell message then
clears the corresponding system request interrupt.
0
x
register and setting bit 4, the Diagnostic Write Enable
Host Interrupt Status
0
x
0
x
16 15
16 15
0
x
Diagnostic Read/Write Address
0
register. A write of any value other than the
x
Write Sequence
0
x
register writes data to or reads data from.
0
x
0
x
0
x
0
x
0
x
register disables write
8
0
8
x
7
0
7
x
0
x
Diagnostic
0
x
register. This
0
x
0
0
0
x
[31:0]
0
x
31
0
0
0
0