LSISAS1064 LSI, LSISAS1064 Datasheet - Page 69

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

4.1
PCI Configuration Space Register Description
Chapter 4
PCI Host Register
Description
This chapter describes the PCI host register space. This chapter consists
of the following sections:
The register map at the beginning of each register description provides
the default bit settings for the register. Shading indicates a reserved bit
or register. Do not access the reserved address areas.
The PCI System Address space consists of three regions: Configuration
Space, Memory Space, and I/O Space. PCI Configuration Space
supports the identification, configuration, initialization and error
management functions for the LSISAS1064 PCI function.
PCI Memory Space [0] and Memory Space [1] form the PCI Memory
Space. PCI Memory Space [0] provides normal system accesses to
memory and PCI Memory Space [1] provides diagnostic memory
accesses. PCI I/O Space provides normal system access to memory.
This section provides bit level descriptions of the PCI Configuration
Space registers.
The LSISAS1064 enables, orders, and locates the PCI extended
capability register structures (Power Management, Messaged Signaled
Interrupts, MSI-X, and PCI-X) to optimize device performance. The
LSISAS1064 does not hard code the location and order of the PCI
extended capability structures. The address and location of the PCI
extended capability structures are subject to change. To access a PCI
extended capability structure, follow the pointers held in the Capability
LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
Section 4.1, “PCI Configuration Space Register Description”
Section 4.2, “PCI I/O Space and Memory Space Register Description”
Table 4.1
defines the PCI Configuration Space registers.
4-1