LSISAS1064 LSI, LSISAS1064 Datasheet - Page 49

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

2.6
Zero Channel RAID
Figure 2.6
Zero channel RAID (ZCR) capabilities enable the LSISAS1064 to
respond to accesses from a PCI RAID controller card or chip that is able
to generate ZCR cycles. The LSISAS1064’s ZCR functionality is
controlled through the ZCR_EN/ and the ALT_GNT/ signals. Both of
these signals have internal pull-ups and are active LOW.
The ZCR_EN/ signal enables ZCR support on the LSISAS1064. Pulling
ZCR_EN/ HIGH disables ZCR support on the LSISAS1064 and causes
the LSISAS1064 to behave as a normal PCI-X to SAS controller. When
ZCR is disabled, the ALT_GNT/ signal has no effect on the LSISAS1064
operation.
Pulling ZCR_EN/ LOW enables ZCR operation. When ZCR is enabled,
the LSISAS1064 responds to PCI configuration cycles when the
ALT_GNT/ signal is asserted. Connect the ALT_GNT/ pin on the
LSISAS1064 to the PCI GNT/ signal of the external I/O processor. This
allows the I/O processor to perform PCI configuration cycles to the
LSISAS1064 when the I/O processor is granted the PCI bus. This
configuration also prevents the system processor from accessing the
LSISAS1064 PCI configuration registers.
Figure 2.7
Notice that the LSISAS1064 does not require the 2:1 mux.
Zero Channel RAID
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
NVSRAM_CS/
MAD[23:16]
MAD[31:24]
MAD[15:8]
MAD[7:0]
MOE[0]/
BWE[2]/
illustrates how to connect the LSISAS1064 to enable ZCR.
NVSRAM Block Diagram
Middle Address
Upper Address
Lower Address
XM_Address[15:8]
XM_Address[23:16]
XM_Address[7:0]
XM_Data[7:0]
CE/
OE/
WE/
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