LSISAS1064 LSI, LSISAS1064 Datasheet - Page 35

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

2.3.1
2.3.1.1
2.3.1.2
PCI Addressing
PCI Configuration Space
PCI I/O Space
The three physical address spaces the PCI specification defines are:
The following sections describe the PCI address spaces.
The PCI Configuration Space is a contiguous 256 x 8-bit set of
addresses. The system BIOS initializes the configuration registers using
PCI configuration cycles. The LSISAS1064 decodes C_BE[3:0]/ to
determine if a PCI cycle intends to access the configuration register
space. The IDSEL signal behaves as a chip select signal that enables
access to the configuration register space only. The LSISAS1064 ignores
configuration read/write cycles when IDSEL is not asserted.
Bits AD[10:8] address the PCI Function Configuration Space (AD[10:8] =
0b000). The LSISAS1064 does not respond to any other encodings of
AD[10:8]. Bits AD[7:2] select one of the 64 Dword registers in the
device’s PCI Configuration Space. Bits AD[1:0] determine if the
configuration command is a Type 0 Configuration Command (AD[1:0] =
0b00) or a Type 1 Configuration Command (AD[1:0] = 0b01). Since the
LSISAS1064 is not a PCI Bridge device, all PCI Configuration
Commands designated for the LSISAS1064 must be Type 0. C_BE[3:0]/
address the individual bytes within each Dword and determine the type
of access to perform.
The PCI specification defines I/O Space as a contiguous 32-bit I/O
address that all system resources share, including the LSISAS1064. The
I/O Base Address
PCI device occupies.
PCI Functional Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
PCI Configuration Space
PCI I/O Space for operating registers
PCI Memory Space for operating registers
register determines the 256-byte PCI I/O area that the
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