LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 130
LSI53C040-160QFP
Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet
1.LSI53C040-160QFP.pdf
(212 pages)
Specifications of LSI53C040-160QFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
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8-4
Register: 0xFF01
Power-On Configuration Zero (POC0)
Read Only
POC0_7
POC0_6
DLCFG
POC0_4
POC0_3
POC0_2
FIBD[1:0]
System Registers
POC0_7
AD7
7
POC0_6
AD6
6
Power-On Configuration 7
The reset value of this bit matches the TTL voltage level
on the AD7 pin at reset.
Power-On Configuration 6
The reset value of this bit matches the TTL voltage level
on the AD6 pin at reset.
Download Serial ROM
When this bit is set, the LSI53C040 attempts to download
from a serial ROM at power-on or after reset. When
cleared, the LSI53C040 will skip the serial ROM
download. The reset value of this bit matches the TTL
voltage level on the AD5 pin at reset. The AD5 pin has
an internal pull-down resistor; if no external pull-up
resistor is used, the reset value will be 0 (do not perform
serial ROM download). If an external pull-up resistor is
used, the reset value will be 1 (perform serial ROM
download).
Power-On Configuration 4
The reset value of this bit tracks the TTL voltage level of
the AD4 pin at reset.
Power-On Configuration 3
The reset value of this bit tracks the TTL voltage level on
the AD3 pin on reset.
Power-On Configuration 2
The reset value of this bit tracks the TTL voltage level on
the AD2 pin on reset.
First Instruction Branch Destination
(read only)
The microcontroller always fetches its first instruction
from address 0x0000. In order to accommodate different
power-on memory mapping configurations, the
DLCFG
AD5
5
POC0_4
AD4
4
POC0_3
AD3
3
POC0_2
AD2
2
FIBD1
AD1
1
FIBD0
AD0
0
[1:0]
7
6
5
4
3
2
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