LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 35

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 2.10 Serial ROM Download
Master
Slave
Table 2.1
2.6.3 Address and Length Download Configuration
4 through n + 2 Firmware
n + 3
Byte
0
1
2
3
Device ID 0
Initial ROM Download Contents
R/W
Bit
Contents
Destination address low
Destination address high
Firmware length (n) low (includes checksum byte but not destination address bytes)
Firmware length (n) high
Checksum for firmware (up to maximum supported ROM size)
ACK
Address High Byte
Register 0xFD05
On a power-on reset or on a soft-chip reset (watchdog timer expires or
the RESET/ pin toggles), the download logic will download data
beginning at address 0x00 of the two-wire slave ROM device.
The first four bytes read from the two-wire external ROM contain the
download destination address and the number of bytes to be
downloaded. The first byte is the destination address low byte. The
second byte is the destination address high byte. The third byte is the
firmware length low byte, and the fourth byte is the firmware length high
byte. The firmware length is the number of bytes of code not including
the two bytes of destination address, or the two bytes of firmware length.
The length does include the final checksum byte. The minimum firmware
length is three bytes.
Two-Wire Serial Interface Operation
RAH[7:0]
ACK
Address Low Byte
Register 0xFD06
RAL[7:0]
ACK
EEPROM
Device ID
1 0 1 0 a b c
ACK
Register 0xFD00
Chip
Addr
Data Byte
1
D[7:0]
each followed
bytes may be
by an ACK)
transferred,
(More data
ACK
Register 0xFD00
Last Data Byte
D[7:0]
ACK
No
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