LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 88

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

4-14
R
Register: 0xFC10
DMA Status (DS)
Read/Write
The DMA function in the LSI53C040 provides the capability of
transferring up to 256 bytes from memory to the SCSI port or vice versa.
The DMA function is designed to handshake automatically with the SCSI
core, to offload the microcontroller and increase SCSI throughput. The
DS register provides basic control of the DMA function, the
Length (DTL)
DMA Source/Destination Low (DSDL)
Source/Destination High (DSDH)
source or destination address for the data to be transferred. The DMA
function does not provide any additional capability for handling SCSI
protocol, so all phase changes and error conditions must still be handled
manually by the microcontroller. The DMA direction is based solely on
the SCSI I/O phase lines.
R
IOD
TC
SCSI and DMA Registers
7
0
R
0
register sets the 8-bit transfer length (1 to 256), and the
can be disabled by resetting all bits in this register and in
the
generated because only three of the lines are valid.
Reserved
Reserved
I/O Direction
This status bit will indicate the current DMA direction.
This bit is written by the microcontroller. A high on this bit
indicates the DMA is reading bytes from the SCSI core
and writing them to memory. A low on this bit indicates
the DMA is reading bytes from memory and writing them
to the SCSI core.
Transfer Complete
This read only status bit will read a 1 following the normal
completion of a DMA transfer.
Select Enable (SER)
5
0
IOD
4
x
(0xFC13) registers set the 16-bit
(0xFC12) and
TC
3
x
register (0xFC04). No parity is
R
2
0
DMA
IEN
1
x
DMA Transfer
TIP
0
x
[4:0]
[7:5]
4
3