LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 87
LSI53C040-160QFP
Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet
1.LSI53C040-160QFP.pdf
(212 pages)
Specifications of LSI53C040-160QFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Register: 0xFC07
Start DMA Initiator Receive (SDIR)
Write Only
This register does not have individual bit definitions. Any write to this
register will initiate a DMA receive from the SCSI bus, for initiator
operation only. The DMA Mode bit (register 0xFC02, bit 1) must be set
(1) and the Target Mode bit (register 0xFC02, bit 6) must be clear (0)
prior to writing this register.
Register: 0xFC08
Current SCSI Data High (CSDHI)
Read Only
SHID[2:0]
R
Register: 0xFC0C
Select Enable High (SENHI)
Write Only
SHID[2:0]
SHID2
SHID2
7
0
7
x
SHID1
SHID1
6
0
6
x
Current SCSI Data High
The Current SCSI Data High register is a read only
register that allows the microcontroller to read the active
SCSI High ID data bus. This register is used during
arbitration to check for higher priority arbitrating devices.
No parity is generated because only three of the lines are
valid.
Reserved
SCSI High ID
The Select Enable Register High for the SCSI High ID
lines is a write only register that is used as a mask to
monitor a single ID during a selection attempt. The
simultaneous occurrence of BSY/ false and SEL/ true and
the correct ID bit, will cause an interrupt. This interrupt
SHID0
SHID0
5
0
5
x
4
0
4
0
0
0
R
0
R
0
0
0
0
0
0
0
[7:5]
[4:0]
[7:5]
4-13
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